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Searched refs:IP1_7_4 (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c47 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
162 #define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
260 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
422 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
423 PINMUX_IPSR_GPSR(IP1_7_4, A9),
424 PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
2357 IP1_7_4
H A Dpfc-r8a77980.c48 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
195 #define IP1_7_4 FM(DU_DG5) FM(SDA5) FM(GETHER_MDC_B) FM(A9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
311 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
496 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
497 PINMUX_IPSR_GPSR(IP1_7_4, SDA5),
498 PINMUX_IPSR_MSEL(IP1_7_4, GETHER_MDC_B, SEL_GETHER_1),
499 PINMUX_IPSR_GPSR(IP1_7_4, A9),
2779 IP1_7_4
H A Dpfc-r8a77995.c75 #define GPSR1_2 F_(DU_DB2, IP1_7_4)
208 #define IP1_7_4 FM(DU_DB2) FM(LCDOUT2) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
350 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
558 PINMUX_IPSR_GPSR(IP1_7_4, DU_DB2),
559 PINMUX_IPSR_GPSR(IP1_7_4, LCDOUT2),
560 PINMUX_IPSR_MSEL(IP1_7_4, IRQ0_B, SEL_IRQ_0_1),
2638 IP1_7_4
H A Dpfc-r8a77990.c128 #define GPSR2_10 F_(QSPI1_IO3, IP1_7_4)
223 #define IP1_7_4 FM(QSPI1_IO3) FM(RIF3_CLK_A) FM(HRX3_C) FM(VI4_DATA4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
387 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
590 PINMUX_IPSR_GPSR(IP1_7_4, QSPI1_IO3),
591 PINMUX_IPSR_MSEL(IP1_7_4, RIF3_CLK_A, SEL_DRIF3_0),
592 PINMUX_IPSR_MSEL(IP1_7_4, HRX3_C, SEL_HSCIF3_2),
593 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA4_A, SEL_VIN4_0),
4785 IP1_7_4
H A Dpfc-r8a77951.c142 #define GPSR2_3 F_(IRQ3, IP1_7_4)
264 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
447 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
698 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
699 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
700 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
701 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
702 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
703 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
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H A Dpfc-r8a77965.c147 #define GPSR2_3 F_(IRQ3, IP1_7_4)
269 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
704 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
705 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
706 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
707 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
708 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
709 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
[all...]
H A Dpfc-r8a7796.c147 #define GPSR2_3 F_(IRQ3, IP1_7_4)
269 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
703 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
704 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
705 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
706 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
707 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
708 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
[all...]
H A Dpfc-r8a77950.c141 #define GPSR2_3 F_(IRQ3, IP1_7_4)
263 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) FM(A25) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
437 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
689 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
690 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
691 PINMUX_IPSR_GPSR(IP1_7_4, A25),
692 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
693 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
694 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_
[all...]
H A Dpfc-r8a7790.c863 PINMUX_IPSR_GPSR(IP1_7_4, D10),
864 PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
865 PINMUX_IPSR_GPSR(IP1_7_4, AVB_TXD2),
866 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0),
867 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1),
868 PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
5153 /* IP1_7_4 [4] */
H A Dpfc-r8a77470.c570 PINMUX_IPSR_GPSR(IP1_7_4, MMC0_D5),
571 PINMUX_IPSR_GPSR(IP1_7_4, SD1_WP),
2797 /* IP1_7_4 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c58 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
173 #define IP1_7_4 FM(DU_DG5) F_(0, 0) F_(0, 0) FM(A9) FM(FSO_CFE_1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
270 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
431 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
432 PINMUX_IPSR_GPSR(IP1_7_4, A9),
433 PINMUX_IPSR_MSEL(IP1_7_4, FSO_CFE_1_N_A, SEL_RFSO_0),
2249 IP1_7_4
H A Dpfc-r8a77980.c60 #define GPSR0_9 F_(DU_DG5, IP1_7_4)
207 #define IP1_7_4 FM(DU_DG5) FM(SDA5) FM(GETHER_MDC_B) FM(A9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
320 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
505 PINMUX_IPSR_GPSR(IP1_7_4, DU_DG5),
506 PINMUX_IPSR_GPSR(IP1_7_4, SDA5),
507 PINMUX_IPSR_MSEL(IP1_7_4, GETHER_MDC_B, SEL_GETHER_1),
508 PINMUX_IPSR_GPSR(IP1_7_4, A9),
2703 IP1_7_4
H A Dpfc-r8a77995.c86 #define GPSR1_2 F_(DU_DB2, IP1_7_4)
219 #define IP1_7_4 FM(DU_DB2) FM(LCDOUT2) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
361 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
569 PINMUX_IPSR_GPSR(IP1_7_4, DU_DB2),
570 PINMUX_IPSR_GPSR(IP1_7_4, LCDOUT2),
571 PINMUX_IPSR_MSEL(IP1_7_4, IRQ0_B, SEL_IRQ_0_1),
2690 IP1_7_4
H A Dpfc-r8a77990.c128 #define GPSR2_10 F_(QSPI1_IO3, IP1_7_4)
223 #define IP1_7_4 FM(QSPI1_IO3) FM(RIF3_CLK_A) FM(HRX3_C) FM(VI4_DATA4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
387 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
591 PINMUX_IPSR_GPSR(IP1_7_4, QSPI1_IO3),
592 PINMUX_IPSR_MSEL(IP1_7_4, RIF3_CLK_A, SEL_DRIF3_0),
593 PINMUX_IPSR_MSEL(IP1_7_4, HRX3_C, SEL_HSCIF3_2),
594 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA4_A, SEL_VIN4_0),
4805 IP1_7_4
H A Dpfc-r8a77951.c141 #define GPSR2_3 F_(IRQ3, IP1_7_4)
263 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
446 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
697 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
698 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
699 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
700 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
701 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
702 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
[all...]
H A Dpfc-r8a77965.c146 #define GPSR2_3 F_(IRQ3, IP1_7_4)
268 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
703 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
704 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
705 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
706 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
707 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
708 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
[all...]
H A Dpfc-r8a7796.c146 #define GPSR2_3 F_(IRQ3, IP1_7_4)
268 #define IP1_7_4 FM(IRQ3) FM(QSTVB_QVE) F_(0, 0) FM(DU_DOTCLKOUT1) FM(VI4_DATA3_B) F_(0, 0) F_(0, 0) FM(MSIOF3_SCK_E) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
702 PINMUX_IPSR_GPSR(IP1_7_4, IRQ3),
703 PINMUX_IPSR_GPSR(IP1_7_4, QSTVB_QVE),
704 PINMUX_IPSR_GPSR(IP1_7_4, DU_DOTCLKOUT1),
705 PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA3_B, SEL_VIN4_1),
706 PINMUX_IPSR_MSEL(IP1_7_4, PWM4_B, SEL_PWM4_1),
707 PINMUX_IPSR_MSEL(IP1_7_4, MSIOF3_SCK_
[all...]
H A Dpfc-r8a7790.c868 PINMUX_IPSR_GPSR(IP1_7_4, D10),
869 PINMUX_IPSR_MSEL(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
870 PINMUX_IPSR_GPSR(IP1_7_4, AVB_TXD2),
871 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2, SEL_VI0_0),
872 PINMUX_IPSR_MSEL(IP1_7_4, VI0_G2_B, SEL_VI0_1),
873 PINMUX_IPSR_MSEL(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
5188 /* IP1_7_4 [4] */
H A Dpfc-r8a77470.c580 PINMUX_IPSR_GPSR(IP1_7_4, MMC0_D5),
581 PINMUX_IPSR_GPSR(IP1_7_4, SD1_WP),
2720 /* IP1_7_4 [4] */

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