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Searched refs:IP0_15_12 (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c53 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
156 #define IP0_15_12 FM(DU_DR5) FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
262 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
396 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
397 PINMUX_IPSR_GPSR(IP0_15_12, HTX0),
398 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2345 IP0_15_12
H A Dpfc-r8a77980.c54 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
189 #define IP0_15_12 FM(DU_DR5) FM(CTS4_N) FM(GETHER_RMII_RXD1) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
313 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
467 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
468 PINMUX_IPSR_GPSR(IP0_15_12, CTS4_N),
469 PINMUX_IPSR_GPSR(IP0_15_12, GETHER_RMII_RXD1),
470 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2767 IP0_15_12
H A Dpfc-r8a77995.c38 #define GPSR0_5 F_(MSIOF2_RXD, IP0_15_12)
202 #define IP0_15_12 FM(MSIOF2_RXD) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
352 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
532 PINMUX_IPSR_GPSR(IP0_15_12, MSIOF2_RXD),
533 PINMUX_IPSR_MSEL(IP0_15_12, SDA3_A, SEL_I2C3_0),
2626 IP0_15_12
H A Dpfc-r8a77990.c135 #define GPSR2_3 F_(QSPI0_IO2, IP0_15_12)
217 #define IP0_15_12 FM(QSPI0_IO2) FM(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
389 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
563 PINMUX_IPSR_GPSR(IP0_15_12, QSPI0_IO2),
564 PINMUX_IPSR_GPSR(IP0_15_12, HTX4_A),
4773 IP0_15_12
H A Dpfc-r8a7790.c822 PINMUX_IPSR_GPSR(IP0_15_12, D4),
823 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5),
824 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2),
825 PINMUX_IPSR_MSEL(IP0_15_12, VI3_DATA4, SEL_VI3_0),
826 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0, SEL_VI0_0),
827 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0_B, SEL_VI0_1),
828 PINMUX_IPSR_MSEL(IP0_15_12, RX0_B, SEL_SCIF0_1),
5107 /* IP0_15_12 [4] */
H A Dpfc-r8a77951.c133 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
258 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
449 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
659 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
660 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
661 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5394 IP0_15_12
H A Dpfc-r8a77965.c138 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
263 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
454 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
665 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
666 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
667 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5600 IP0_15_12
H A Dpfc-r8a7796.c138 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
263 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
454 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
665 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
666 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
667 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5347 IP0_15_12
H A Dpfc-r8a77950.c132 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
257 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
439 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
654 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
655 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
656 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5033 IP0_15_12
H A Dpfc-r8a77470.c552 PINMUX_IPSR_GPSR(IP0_15_12, SD0_DAT1),
553 PINMUX_IPSR_MSEL(IP0_15_12, SSI_SCK0129_B, SEL_SSI0_1),
554 PINMUX_IPSR_MSEL(IP0_15_12, TX4_E, SEL_SCIF4_4),
2763 /* IP0_15_12 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c64 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
167 #define IP0_15_12 FM(DU_DR5) FM(HTX0) F_(0, 0) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
272 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
405 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
406 PINMUX_IPSR_GPSR(IP0_15_12, HTX0),
407 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2237 IP0_15_12
H A Dpfc-r8a77980.c66 #define GPSR0_3 F_(DU_DR5, IP0_15_12)
201 #define IP0_15_12 FM(DU_DR5) FM(CTS4_N) FM(GETHER_RMII_RXD1) FM(A3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
322 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
476 PINMUX_IPSR_GPSR(IP0_15_12, DU_DR5),
477 PINMUX_IPSR_GPSR(IP0_15_12, CTS4_N),
478 PINMUX_IPSR_GPSR(IP0_15_12, GETHER_RMII_RXD1),
479 PINMUX_IPSR_GPSR(IP0_15_12, A3),
2691 IP0_15_12
H A Dpfc-r8a77995.c49 #define GPSR0_5 F_(MSIOF2_RXD, IP0_15_12)
213 #define IP0_15_12 FM(MSIOF2_RXD) FM(SDA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
363 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
543 PINMUX_IPSR_GPSR(IP0_15_12, MSIOF2_RXD),
544 PINMUX_IPSR_MSEL(IP0_15_12, SDA3_A, SEL_I2C3_0),
2678 IP0_15_12
H A Dpfc-r8a7790.c827 PINMUX_IPSR_GPSR(IP0_15_12, D4),
828 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5),
829 PINMUX_IPSR_MSEL(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2),
830 PINMUX_IPSR_MSEL(IP0_15_12, VI3_DATA4, SEL_VI3_0),
831 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0, SEL_VI0_0),
832 PINMUX_IPSR_MSEL(IP0_15_12, VI0_R0_B, SEL_VI0_1),
833 PINMUX_IPSR_MSEL(IP0_15_12, RX0_B, SEL_SCIF0_1),
5143 /* IP0_15_12 [4] */
H A Dpfc-r8a77990.c135 #define GPSR2_3 F_(QSPI0_IO2, IP0_15_12)
217 #define IP0_15_12 FM(QSPI0_IO2) FM(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
389 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
564 PINMUX_IPSR_GPSR(IP0_15_12, QSPI0_IO2),
565 PINMUX_IPSR_GPSR(IP0_15_12, HTX4_A),
4793 IP0_15_12
H A Dpfc-r8a77951.c132 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
257 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
448 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
658 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
659 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
660 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5352 IP0_15_12
H A Dpfc-r8a77965.c137 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
262 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
664 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
665 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
666 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5548 IP0_15_12
H A Dpfc-r8a7796.c137 #define GPSR2_12 F_(AVB_LINK, IP0_15_12)
262 #define IP0_15_12 FM(AVB_LINK) F_(0, 0) FM(MSIOF2_SCK_C) FM(TX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
453 FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \
664 PINMUX_IPSR_GPSR(IP0_15_12, AVB_LINK),
665 PINMUX_IPSR_MSEL(IP0_15_12, MSIOF2_SCK_C, SEL_MSIOF2_2),
666 PINMUX_IPSR_MSEL(IP0_15_12, TX4_A, SEL_SCIF4_0),
5307 IP0_15_12
H A Dpfc-r8a77470.c562 PINMUX_IPSR_GPSR(IP0_15_12, SD0_DAT1),
563 PINMUX_IPSR_MSEL(IP0_15_12, SSI_SCK0129_B, SEL_SSI0_1),
564 PINMUX_IPSR_MSEL(IP0_15_12, TX4_E, SEL_SCIF4_4),
2688 /* IP0_15_12 [4] */

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