HHI_VID_PLL_CLK_DIV (reference) in projects: kernel - OpenGrok search results

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Searched refs:HHI_VID_PLL_CLK_DIV (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/meson/
H A D	meson_vclk.c	50 #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */ macro 140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set() 141 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_PRESET, 0); in meson_vid_pll_set() 204 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 208 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 211 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 213 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 215 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 219 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 221 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/
H A D	meson_vclk.c	50 #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */ macro 140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set() 141 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_PRESET, 0); in meson_vid_pll_set() 204 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 208 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 211 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 213 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 215 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 219 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() 221 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, in meson_vid_pll_set() [all...]
/kernel/linux/linux-6.6/drivers/clk/meson/
H A D	axg.h	`69 #define HHI_VID_PLL_CLK_DIV 0x1a0 macro`
H A D	g12a.h	`69 #define HHI_VID_PLL_CLK_DIV 0x1A0 macro`
H A D	gxbb.h	`52 #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */ macro`
H A D	gxbb.c	`1780 .reg_off = HHI_VID_PLL_CLK_DIV, 1785 .reg_off = HHI_VID_PLL_CLK_DIV, 1823 .offset = HHI_VID_PLL_CLK_DIV, 1842 .offset = HHI_VID_PLL_CLK_DIV,`
H A D	g12a.c	`2642 .reg_off = HHI_VID_PLL_CLK_DIV, 2647 .reg_off = HHI_VID_PLL_CLK_DIV, 2668 .offset = HHI_VID_PLL_CLK_DIV, 2687 .offset = HHI_VID_PLL_CLK_DIV,`
/kernel/linux/linux-5.10/drivers/clk/meson/
H A D	gxbb.h	`52 #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */ macro`
H A D	axg.h	`70 #define HHI_VID_PLL_CLK_DIV 0x1a0 macro`
H A D	g12a.h	`69 #define HHI_VID_PLL_CLK_DIV 0x1A0 macro`
H A D	gxbb.c	`1777 .reg_off = HHI_VID_PLL_CLK_DIV, 1782 .reg_off = HHI_VID_PLL_CLK_DIV, 1820 .offset = HHI_VID_PLL_CLK_DIV, 1839 .offset = HHI_VID_PLL_CLK_DIV,`
H A D	g12a.c	`2639 .reg_off = HHI_VID_PLL_CLK_DIV, 2644 .reg_off = HHI_VID_PLL_CLK_DIV, 2665 .offset = HHI_VID_PLL_CLK_DIV, 2684 .offset = HHI_VID_PLL_CLK_DIV,`

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