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Searched refs:GraphicsLevel (Results 1 - 25 of 36) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dtonga_smumgr.c695 offsetof(SMU72_Discrete_DpmTable, GraphicsLevel); in tonga_populate_all_graphic_levels()
700 SMU72_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel; in tonga_populate_all_graphic_levels()
713 &(smu_data->smc_state_table.GraphicsLevel[i])); in tonga_populate_all_graphic_levels()
719 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in tonga_populate_all_graphic_levels()
723 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in tonga_populate_all_graphic_levels()
727 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in tonga_populate_all_graphic_levels()
741 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = in tonga_populate_all_graphic_levels()
771 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled; in tonga_populate_all_graphic_levels()
774 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in tonga_populate_all_graphic_levels()
777 smu_data->smc_state_table.GraphicsLevel[ in tonga_populate_all_graphic_levels()
[all...]
H A Diceland_smumgr.c965 offsetof(SMU71_Discrete_DpmTable, GraphicsLevel); in iceland_populate_all_graphic_levels()
970 SMU71_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel; in iceland_populate_all_graphic_levels()
983 &(smu_data->smc_state_table.GraphicsLevel[i])); in iceland_populate_all_graphic_levels()
989 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in iceland_populate_all_graphic_levels()
993 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in iceland_populate_all_graphic_levels()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1027 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled; in iceland_populate_all_graphic_levels()
1031 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in iceland_populate_all_graphic_levels()
1034 smu_data->smc_state_table.GraphicsLevel[1].pcieDpmLevel = mid_pcie_level_enabled; in iceland_populate_all_graphic_levels()
H A Dfiji_smumgr.c250 level_addr = table_start + offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_setup_graphics_level_structure()
1012 offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_populate_all_graphic_levels()
1016 smu_data->smc_state_table.GraphicsLevel; in fiji_populate_all_graphic_levels()
1747 GraphicsLevel[smu_data->smc_state_table.GraphicsDpmLevelCount - 1]. in fiji_populate_clock_stretcher_data_table()
1791 smu_data->smc_state_table.GraphicsLevel[j].SclkFrequency); in fiji_populate_clock_stretcher_data_table()
2558 smu_data->smc_state_table.GraphicsLevel; in fiji_update_dpm_settings()
2560 offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_update_dpm_settings()
H A Dpolaris10_smumgr.c147 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_setup_graphics_level_structure()
989 offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_populate_all_graphic_levels()
993 smu_data->smc_state_table.GraphicsLevel; in polaris10_populate_all_graphic_levels()
1006 &(smu_data->smc_state_table.GraphicsLevel[i])); in polaris10_populate_all_graphic_levels()
1016 smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0; in polaris10_populate_all_graphic_levels()
1018 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in polaris10_populate_all_graphic_levels()
2476 smu_data->smc_state_table.GraphicsLevel; in polaris10_update_dpm_settings()
2478 offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_update_dpm_settings()
H A Dci_smumgr.c478 offsetof(SMU7_Discrete_DpmTable, GraphicsLevel); in ci_populate_all_graphic_levels()
482 smu_data->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels()
492 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in ci_populate_all_graphic_levels()
494 smu_data->smc_state_table.GraphicsLevel[i].DisplayWatermark = in ci_populate_all_graphic_levels()
498 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in ci_populate_all_graphic_levels()
2766 smu_data->smc_state_table.GraphicsLevel; in ci_update_dpm_settings()
2768 offsetof(SMU7_Discrete_DpmTable, GraphicsLevel); in ci_update_dpm_settings()
H A Dvegam_smumgr.c876 offsetof(SMU75_Discrete_DpmTable, GraphicsLevel); in vegam_populate_all_graphic_levels()
880 smu_data->smc_state_table.GraphicsLevel; in vegam_populate_all_graphic_levels()
893 &(smu_data->smc_state_table.GraphicsLevel[i])); in vegam_populate_all_graphic_levels()
907 smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0; in vegam_populate_all_graphic_levels()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dtonga_smumgr.c695 offsetof(SMU72_Discrete_DpmTable, GraphicsLevel); in tonga_populate_all_graphic_levels()
700 SMU72_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel; in tonga_populate_all_graphic_levels()
713 &(smu_data->smc_state_table.GraphicsLevel[i])); in tonga_populate_all_graphic_levels()
719 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in tonga_populate_all_graphic_levels()
723 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in tonga_populate_all_graphic_levels()
727 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in tonga_populate_all_graphic_levels()
741 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = in tonga_populate_all_graphic_levels()
771 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled; in tonga_populate_all_graphic_levels()
774 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in tonga_populate_all_graphic_levels()
777 smu_data->smc_state_table.GraphicsLevel[ in tonga_populate_all_graphic_levels()
[all...]
H A Diceland_smumgr.c965 offsetof(SMU71_Discrete_DpmTable, GraphicsLevel); in iceland_populate_all_graphic_levels()
970 SMU71_Discrete_GraphicsLevel *levels = smu_data->smc_state_table.GraphicsLevel; in iceland_populate_all_graphic_levels()
983 &(smu_data->smc_state_table.GraphicsLevel[i])); in iceland_populate_all_graphic_levels()
989 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in iceland_populate_all_graphic_levels()
993 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in iceland_populate_all_graphic_levels()
997 smu_data->smc_state_table.GraphicsLevel[dpm_table->sclk_table.count-1].DisplayWatermark = in iceland_populate_all_graphic_levels()
1027 smu_data->smc_state_table.GraphicsLevel[i].pcieDpmLevel = highest_pcie_level_enabled; in iceland_populate_all_graphic_levels()
1031 smu_data->smc_state_table.GraphicsLevel[0].pcieDpmLevel = lowest_pcie_level_enabled; in iceland_populate_all_graphic_levels()
1034 smu_data->smc_state_table.GraphicsLevel[1].pcieDpmLevel = mid_pcie_level_enabled; in iceland_populate_all_graphic_levels()
H A Dfiji_smumgr.c250 level_addr = table_start + offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_setup_graphics_level_structure()
1011 offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_populate_all_graphic_levels()
1015 smu_data->smc_state_table.GraphicsLevel; in fiji_populate_all_graphic_levels()
1745 GraphicsLevel[smu_data->smc_state_table.GraphicsDpmLevelCount - 1]. in fiji_populate_clock_stretcher_data_table()
1789 smu_data->smc_state_table.GraphicsLevel[j].SclkFrequency); in fiji_populate_clock_stretcher_data_table()
2556 smu_data->smc_state_table.GraphicsLevel; in fiji_update_dpm_settings()
2558 offsetof(SMU73_Discrete_DpmTable, GraphicsLevel); in fiji_update_dpm_settings()
H A Dpolaris10_smumgr.c147 graphics_level_address = dpm_table_start + offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_setup_graphics_level_structure()
1047 offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_populate_all_graphic_levels()
1051 smu_data->smc_state_table.GraphicsLevel; in polaris10_populate_all_graphic_levels()
1071 &(smu_data->smc_state_table.GraphicsLevel[i])); in polaris10_populate_all_graphic_levels()
1081 smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0; in polaris10_populate_all_graphic_levels()
1103 smu_data->smc_state_table.GraphicsLevel[i].EnabledForActivity = in polaris10_populate_all_graphic_levels()
2594 smu_data->smc_state_table.GraphicsLevel; in polaris10_update_dpm_settings()
2596 offsetof(SMU74_Discrete_DpmTable, GraphicsLevel); in polaris10_update_dpm_settings()
H A Dci_smumgr.c479 offsetof(SMU7_Discrete_DpmTable, GraphicsLevel); in ci_populate_all_graphic_levels()
483 smu_data->smc_state_table.GraphicsLevel; in ci_populate_all_graphic_levels()
493 smu_data->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; in ci_populate_all_graphic_levels()
495 smu_data->smc_state_table.GraphicsLevel[i].DisplayWatermark = in ci_populate_all_graphic_levels()
499 smu_data->smc_state_table.GraphicsLevel[0].EnabledForActivity = 1; in ci_populate_all_graphic_levels()
2767 smu_data->smc_state_table.GraphicsLevel; in ci_update_dpm_settings()
2769 offsetof(SMU7_Discrete_DpmTable, GraphicsLevel); in ci_update_dpm_settings()
H A Dvegam_smumgr.c875 offsetof(SMU75_Discrete_DpmTable, GraphicsLevel); in vegam_populate_all_graphic_levels()
879 smu_data->smc_state_table.GraphicsLevel; in vegam_populate_all_graphic_levels()
892 &(smu_data->smc_state_table.GraphicsLevel[i])); in vegam_populate_all_graphic_levels()
906 smu_data->smc_state_table.GraphicsLevel[0].SclkSetting.SSc_En = 0; in vegam_populate_all_graphic_levels()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/
H A Dsmu7_fusion.h233 SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SCLK_DPM_STATE]; member
H A Dsmu7_discrete.h323 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS]; member
H A Dsmu71_discrete.h211 // Use this instead of copies of the GraphicsLevel and MemoryLevel structures to keep track of state parameters
270 SMU71_Discrete_GraphicsLevel GraphicsLevel [SMU71_MAX_LEVELS_GRAPHICS]; member
H A Dsmu75_discrete.h287 SMU75_Discrete_GraphicsLevel GraphicsLevel [SMU75_MAX_LEVELS_GRAPHICS]; member
H A Dsmu74_discrete.h281 SMU74_Discrete_GraphicsLevel GraphicsLevel[SMU74_MAX_LEVELS_GRAPHICS]; member
H A Dsmu72_discrete.h265 SMU72_Discrete_GraphicsLevel GraphicsLevel[SMU72_MAX_LEVELS_GRAPHICS]; member
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h233 SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SCLK_DPM_STATE]; member
H A Dsmu7_discrete.h322 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_fusion.h224 SMU7_Fusion_GraphicsLevel GraphicsLevel[SMU__NUM_SCLK_DPM_STATE]; member
H A Dsmu71_discrete.h211 // Use this instead of copies of the GraphicsLevel and MemoryLevel structures to keep track of state parameters
270 SMU71_Discrete_GraphicsLevel GraphicsLevel [SMU71_MAX_LEVELS_GRAPHICS]; member
H A Dsmu7_discrete.h323 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dsmu7_fusion.h233 SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SCLK_DPM_STATE]; member
H A Dsmu7_discrete.h322 SMU7_Discrete_GraphicsLevel GraphicsLevel [SMU7_MAX_LEVELS_GRAPHICS]; member

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