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Searched refs:GICR_CTLR (Results 1 - 11 of 11) sorted by relevance

/kernel/liteos_a/arch/arm/gic/
H A Dgic_v3.c260 GicWaitForRwp(GICR_CTLR(i)); in HalIrqMask()
280 GicWaitForRwp(GICR_CTLR(i)); in HalIrqUnmask()
331 GicWaitForRwp(GICR_CTLR(cpu)); in HalIrqInitPercpu()
343 GicWaitForRwp(GICR_CTLR(cpu)); in HalIrqInitPercpu()
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/include/aarch64/
H A Dgic_v3.h42 #define GICR_CTLR 0x000 macro
/kernel/liteos_a/arch/arm/include/
H A Dgic_v3.h87 #define GICR_CTLR(i) (GICR_OFFSET + GICR_STRIDE * (i) + 0x0000) macro
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic_v3.c48 while (readl(redist_base + GICR_CTLR) & GICR_CTLR_RWP) { in gicv3_gicr_wait_for_rwp()
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-gic-v3-its.c2999 val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); in allocate_lpi_tables()
3070 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3141 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3143 writel_relaxed(val, rbase + GICR_CTLR); in its_cpu_init_lpis()
5127 val = readl_relaxed(rbase + GICR_CTLR); in redist_disable_lpis()
5151 writel_relaxed(val, rbase + GICR_CTLR); in redist_disable_lpis()
5153 /* Make sure any change to GICR_CTLR is observable by the GIC */ in redist_disable_lpis()
5157 * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs in redist_disable_lpis()
5161 while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { in redist_disable_lpis()
5173 * DEFINED whether GICR_CTLR in redist_disable_lpis()
[all...]
/kernel/linux/linux-6.6/drivers/irqchip/
H A Dirq-gic-v3-its.c3024 val = readl_relaxed(gic_data_rdist_rd_base() + GICR_CTLR); in allocate_lpi_tables()
3105 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3180 val = readl_relaxed(rbase + GICR_CTLR); in its_cpu_init_lpis()
3182 writel_relaxed(val, rbase + GICR_CTLR); in its_cpu_init_lpis()
5220 val = readl_relaxed(rbase + GICR_CTLR); in redist_disable_lpis()
5244 writel_relaxed(val, rbase + GICR_CTLR); in redist_disable_lpis()
5246 /* Make sure any change to GICR_CTLR is observable by the GIC */ in redist_disable_lpis()
5250 * Software must observe RWP==0 after clearing GICR_CTLR.EnableLPIs in redist_disable_lpis()
5254 while (readl_relaxed(rbase + GICR_CTLR) & GICR_CTLR_RWP) { in redist_disable_lpis()
5266 * DEFINED whether GICR_CTLR in redist_disable_lpis()
[all...]
H A Dirq-gic-v3.c1057 u32 ctlr = readl_relaxed(ptr + GICR_CTLR); in __gic_update_rdist_properties()
/kernel/linux/linux-5.10/include/linux/irqchip/
H A Darm-gic-v3.h114 #define GICR_CTLR GICD_CTLR macro
/kernel/linux/linux-6.6/include/linux/irqchip/
H A Darm-gic-v3.h114 #define GICR_CTLR GICD_CTLR macro
/kernel/linux/linux-5.10/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c611 REGISTER_DESC_WITH_LENGTH(GICR_CTLR,
/kernel/linux/linux-6.6/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c676 REGISTER_DESC_WITH_LENGTH(GICR_CTLR,

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