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Searched refs:GEN8_L3SQCREG1 (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c337 val = intel_gt_mcr_read_any(to_gt(i915), GEN8_L3SQCREG1); in gen8_set_l3sqc_credits()
341 intel_gt_mcr_multicast_write(to_gt(i915), GEN8_L3SQCREG1, val); in gen8_set_l3sqc_credits() local
347 intel_gt_mcr_read_any(to_gt(i915), GEN8_L3SQCREG1); in gen8_set_l3sqc_credits() local
H A Dintel_gvt_mmio_table.c1238 MMIO_D(GEN8_L3SQCREG1); in iterate_bxt_mmio()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c1888 GEN8_L3SQCREG1, in rcs_engine_wa_init()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_gt_regs.h1015 #define GEN8_L3SQCREG1 MCR_REG(0xb100) macro
H A Dintel_workarounds.c2731 GEN8_L3SQCREG1, in rcs_engine_wa_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Dintel_pm.c7093 val = I915_READ(GEN8_L3SQCREG1); in gen8_set_l3sqc_credits()
7097 I915_WRITE(GEN8_L3SQCREG1, val); in gen8_set_l3sqc_credits()
7103 POSTING_READ(GEN8_L3SQCREG1); in gen8_set_l3sqc_credits()
H A Di915_reg.h8052 #define GEN8_L3SQCREG1 _MMIO(0xB100) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2778 MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c3360 MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()

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