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Searched refs:GEN7_MISCCPCTL (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_fw.c35 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in guc_prepare_xfer()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c334 misccpctl = intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL, in gen8_set_l3sqc_credits()
349 intel_uncore_write(&i915->uncore, GEN7_MISCCPCTL, misccpctl); in gen8_set_l3sqc_credits()
487 intel_uncore_rmw(&i915->uncore, GEN7_MISCCPCTL, in skl_init_clock_gating()
H A Dvlv_suspend.c148 s->misccpctl = intel_uncore_read(uncore, GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
233 intel_uncore_write(uncore, GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
H A Di915_irq.c196 misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL, in ivb_parity_work()
198 intel_uncore_posting_read(&dev_priv->uncore, GEN7_MISCCPCTL); in ivb_parity_work()
240 intel_uncore_write(&dev_priv->uncore, GEN7_MISCCPCTL, misccpctl); in ivb_parity_work()
H A Di915_perf.c2426 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_enable_metric_set()
2442 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_disable_metric_set()
H A Dintel_gvt_mmio_table.c801 MMIO_D(GEN7_MISCCPCTL); in iterate_bdw_plus_mmio()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Dvlv_suspend.c145 s->misccpctl = intel_uncore_read(uncore, GEN7_MISCCPCTL); in vlv_save_gunit_s0ix_state()
231 intel_uncore_write(uncore, GEN7_MISCCPCTL, s->misccpctl); in vlv_restore_gunit_s0ix_state()
H A Di915_irq.c976 misccpctl = I915_READ(GEN7_MISCCPCTL); in ivb_parity_work()
977 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in ivb_parity_work()
978 POSTING_READ(GEN7_MISCCPCTL); in ivb_parity_work()
1019 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in ivb_parity_work()
H A Di915_perf.c2029 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_enable_metric_set()
2045 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, in hsw_disable_metric_set()
H A Dintel_pm.c7090 misccpctl = I915_READ(GEN7_MISCCPCTL); in gen8_set_l3sqc_credits()
7091 I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); in gen8_set_l3sqc_credits()
7105 I915_WRITE(GEN7_MISCCPCTL, misccpctl); in gen8_set_l3sqc_credits()
7240 I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) & in skl_init_clock_gating()
H A Di915_reg.h9291 #define GEN7_MISCCPCTL _MMIO(0x9424) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_fw.c43 intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0, in guc_prepare_xfer()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c1518 wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, in gen12_gt_workarounds_init()
1707 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in dg2_gt_workarounds_init()
1729 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in pvc_gt_workarounds_init()
1756 wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE); in xelpg_gt_workarounds_init()
H A Dintel_gt_regs.h699 #define GEN7_MISCCPCTL _MMIO(0x9424) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2854 MMIO_D(GEN7_MISCCPCTL, D_BDW_PLUS); in init_bdw_mmio_info()

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