/kernel/linux/linux-5.10/drivers/clk/samsung/ |
H A D | clk-exynos5250.c | 80 #define GATE_IP_PERIS 0x10960 macro 160 GATE_IP_PERIS, 603 GATE(CLK_CHIPID, "chipid", "div_aclk66", GATE_IP_PERIS, 0, 0, 0), 605 GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 606 GATE(CLK_PMU, "pmu", "div_aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED, 609 GATE_IP_PERIS, 3, CLK_IGNORE_UNUSED, 0), 611 GATE_IP_PERIS, 4, CLK_IGNORE_UNUSED, 0), 613 GATE_IP_PERIS, 5, CLK_IGNORE_UNUSED, 0), 614 GATE(CLK_TZPC0, "tzpc0", "div_aclk66", GATE_IP_PERIS, 6, 0, 0), 615 GATE(CLK_TZPC1, "tzpc1", "div_aclk66", GATE_IP_PERIS, [all...] |
H A D | clk-exynos5410.c | 54 #define GATE_IP_PERIS 0x10960 macro 167 GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0), 168 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0), 169 GATE(CLK_RTC, "rtc", "aclk66", GATE_IP_PERIS, 20, 0, 0), 170 GATE(CLK_TMU, "tmu", "aclk66", GATE_IP_PERIS, 21, 0, 0),
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H A D | clk-exynos5420.c | 122 #define GATE_IP_PERIS 0x10960 macro 246 GATE_IP_PERIS, 289 { .offset = GATE_IP_PERIS, .value = 0xffffffff, }, 1109 GATE_IP_PERIS, 0, CLK_IGNORE_UNUSED, 0), 1111 GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 1112 GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_IP_PERIS, 6, 0, 0), 1113 GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_IP_PERIS, 7, 0, 0), 1114 GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_IP_PERIS, 8, 0, 0), 1115 GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_IP_PERIS, 9, 0, 0), 1116 GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_IP_PERIS, 1 [all...] |
/kernel/linux/linux-6.6/drivers/clk/samsung/ |
H A D | clk-exynos5250.c | 80 #define GATE_IP_PERIS 0x10960 macro 163 GATE_IP_PERIS, 606 GATE(CLK_CHIPID, "chipid", "div_aclk66", GATE_IP_PERIS, 0, 0, 0), 608 GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 609 GATE(CLK_PMU, "pmu", "div_aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED, 612 GATE_IP_PERIS, 3, CLK_IGNORE_UNUSED, 0), 614 GATE_IP_PERIS, 4, CLK_IGNORE_UNUSED, 0), 616 GATE_IP_PERIS, 5, CLK_IGNORE_UNUSED, 0), 617 GATE(CLK_TZPC0, "tzpc0", "div_aclk66", GATE_IP_PERIS, 6, 0, 0), 618 GATE(CLK_TZPC1, "tzpc1", "div_aclk66", GATE_IP_PERIS, [all...] |
H A D | clk-exynos5410.c | 54 #define GATE_IP_PERIS 0x10960 macro 170 GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0), 171 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0), 172 GATE(CLK_RTC, "rtc", "aclk66", GATE_IP_PERIS, 20, 0, 0), 173 GATE(CLK_TMU, "tmu", "aclk66", GATE_IP_PERIS, 21, 0, 0),
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H A D | clk-exynos5420.c | 122 #define GATE_IP_PERIS 0x10960 macro 249 GATE_IP_PERIS, 292 { .offset = GATE_IP_PERIS, .value = 0xffffffff, }, 1112 GATE_IP_PERIS, 0, CLK_IGNORE_UNUSED, 0), 1114 GATE_IP_PERIS, 1, CLK_IGNORE_UNUSED, 0), 1115 GATE(CLK_TZPC0, "tzpc0", "aclk66_psgen", GATE_IP_PERIS, 6, 0, 0), 1116 GATE(CLK_TZPC1, "tzpc1", "aclk66_psgen", GATE_IP_PERIS, 7, 0, 0), 1117 GATE(CLK_TZPC2, "tzpc2", "aclk66_psgen", GATE_IP_PERIS, 8, 0, 0), 1118 GATE(CLK_TZPC3, "tzpc3", "aclk66_psgen", GATE_IP_PERIS, 9, 0, 0), 1119 GATE(CLK_TZPC4, "tzpc4", "aclk66_psgen", GATE_IP_PERIS, 1 [all...] |