| /kernel/linux/linux-5.10/arch/sh/math-emu/ |
| H A D | math.c | 27 #define FPSCR (fregs->fpscr) macro
28 #define FPSCR_RM (FPSCR&3)
29 #define FPSCR_DN ((FPSCR>>18)&1)
30 #define FPSCR_PR ((FPSCR>>19)&1)
31 #define FPSCR_SZ ((FPSCR>>20)&1)
32 #define FPSCR_FR ((FPSCR>>21)&1)
341 FPSCR ^= flag; in fxchg()
434 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR; in id_sys()
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| /kernel/linux/linux-6.6/arch/sh/math-emu/ |
| H A D | math.c | 27 #define FPSCR (fregs->fpscr) macro
28 #define FPSCR_RM (FPSCR&3)
29 #define FPSCR_DN ((FPSCR>>18)&1)
30 #define FPSCR_PR ((FPSCR>>19)&1)
31 #define FPSCR_SZ ((FPSCR>>20)&1)
32 #define FPSCR_FR ((FPSCR>>21)&1)
341 FPSCR ^= flag; in fxchg()
434 unsigned long *reg = (code & 0x0010) ? &FPUL : &FPSCR; in id_sys()
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| /kernel/liteos_a/arch/arm/arm/src/ |
| H A D | los_dispatch.S | 61 VMRS \reg1, FPSCR
77 VMSR FPSCR, \reg1
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| /kernel/linux/linux-6.6/arch/arm/vfp/ |
| H A D | vfpmodule.c | 234 fmrx(FPEXC), fmrx(FPSCR), inst); in vfp_panic()
256 * If any of the status flags are set, update the FPSCR. in vfp_raise_exceptions()
265 fmxr(FPSCR, fpscr); in vfp_raise_exceptions()
346 orig_fpscr = fpscr = fmrx(FPSCR); in VFP_bounce()
349 * Check for the special VFP subarch 1 and FPSCR.IXE bit case in VFP_bounce()
369 * unallocated VFP instruction but with FPSCR.IXE set and not in VFP_bounce()
379 * whether FPEXC.VECITR or FPSCR.LEN is used. in VFP_bounce()
754 u32 fpscr = fmrx(FPSCR); in vfp_support_entry()
758 * setting FPSCR.IXE causes all the CDP instructions to in vfp_support_entry()
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| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| H A D | vfp.h | 14 #define FPSCR cr1 macro
56 /* FPSCR bits */
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| H A D | vfp.h | 14 #define FPSCR cr1 macro
56 /* FPSCR bits */
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| /kernel/liteos_m/arch/arm/cortex-m3/keil/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| H A D | los_context.c | 115 context->FPSCR = 0x00000000;
in ArchTskStackInit()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| H A D | los_context.c | 114 context->FPSCR = 0x00000000;
in ArchTskStackInit()
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| /kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/ |
| H A D | los_arch_context.h | 102 UINT32 FPSCR; member
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| H A D | los_context.c | 114 context->FPSCR = 0x00000000;
in ArchTskStackInit()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| H A D | los_context.c | 114 context->FPSCR = 0x00000000;
in ArchTskStackInit()
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| /kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/ |
| H A D | los_arch_context.h | 102 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m4/iar/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/ |
| H A D | los_arch_context.h | 100 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/ |
| H A D | los_arch_context.h | 102 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
|
| /kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/ |
| H A D | los_arch_context.h | 102 UINT32 FPSCR; member
|
| /kernel/liteos_m/arch/arm/cortex-m7/gcc/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| /kernel/liteos_m/arch/arm/cortex-m7/iar/ |
| H A D | los_arch_context.h | 99 UINT32 FPSCR; member
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| /kernel/linux/linux-5.10/arch/arm/vfp/ |
| H A D | vfpmodule.c | 234 fmrx(FPEXC), fmrx(FPSCR), inst); in vfp_panic()
256 * If any of the status flags are set, update the FPSCR. in vfp_raise_exceptions()
265 fmxr(FPSCR, fpscr); in vfp_raise_exceptions()
345 orig_fpscr = fpscr = fmrx(FPSCR); in VFP_bounce()
348 * Check for the special VFP subarch 1 and FPSCR.IXE bit case in VFP_bounce()
370 * unallocated VFP instruction but with FPSCR.IXE set and not in VFP_bounce()
380 * whether FPEXC.VECITR or FPSCR.LEN is used. in VFP_bounce()
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| H A D | vfphw.S | 110 VFPFMRX r5, FPSCR @ current status
120 stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2
153 ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2
163 VFPFMXR FPSCR, r5 @ restore status
186 @ On some implementations of the VFP subarch 1, setting FPSCR.IXE
189 VFPFMRX r5, FPSCR
227 VFPFMRX r2, FPSCR @ current status
235 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
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