Searched refs:EMC_SEL_DPD_CTRL (Results 1 - 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| H A D | tegra124-emc.c | 193 #define EMC_SEL_DPD_CTRL 0x3d8 macro
604 val = readl(emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_prepare_timing_change()
607 writel(val, emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_prepare_timing_change()
842 writel(timing->emc_sel_dpd_ctrl, emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_complete_timing_change()
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| H A D | tegra30-emc.c | 135 #define EMC_SEL_DPD_CTRL 0x3d8 macro
625 val = readl_relaxed(emc->regs + EMC_SEL_DPD_CTRL); in emc_prepare_timing_change()
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| H A D | tegra210-emc-cc-r21021.c | 721 emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
753 emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
1712 emc_writel(emc, next->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
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| H A D | tegra210-emc.h | 187 #define EMC_SEL_DPD_CTRL 0x3d8 macro
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| H A D | tegra124-emc.c | 200 #define EMC_SEL_DPD_CTRL 0x3d8 macro
634 val = readl(emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_prepare_timing_change()
637 writel(val, emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_prepare_timing_change()
872 writel(timing->emc_sel_dpd_ctrl, emc->regs + EMC_SEL_DPD_CTRL); in tegra_emc_complete_timing_change()
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| H A D | tegra210-emc-cc-r21021.c | 721 emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
753 emc_writel(emc, emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
1712 emc_writel(emc, next->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); in tegra210_emc_r21021_set_clock()
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| H A D | tegra210-emc.h | 187 #define EMC_SEL_DPD_CTRL 0x3d8 macro
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| H A D | tegra30-emc.c | 146 #define EMC_SEL_DPD_CTRL 0x3d8 macro
666 val = readl_relaxed(emc->regs + EMC_SEL_DPD_CTRL); in emc_prepare_timing_change()
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