Searched refs:DIV_MASK (Results 1 - 5 of 5) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 58 #define E4210_DIV0_ATB_MASK (DIV_MASK << E4210_DIV0_ATB_SHIFT)
61 #define DIV_MASK 7 macro
154 unsigned long alt_div = 0, alt_div_mask = DIV_MASK; in exynos_cpuclk_pre_rate_change()
230 unsigned long div = 0, div_mask = DIV_MASK; in exynos_cpuclk_post_rate_change()
282 unsigned long alt_div = 0, alt_div_mask = DIV_MASK; in exynos5433_cpuclk_pre_rate_change()
340 unsigned long div = 0, div_mask = DIV_MASK; in exynos5433_cpuclk_post_rate_change()
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| H A D | clk-cpu.c | 58 #define E4210_DIV0_ATB_MASK (DIV_MASK << E4210_DIV0_ATB_SHIFT)
61 #define DIV_MASK 7 macro
154 unsigned long alt_div = 0, alt_div_mask = DIV_MASK; in exynos_cpuclk_pre_rate_change()
230 unsigned long div = 0, div_mask = DIV_MASK; in exynos_cpuclk_post_rate_change()
282 unsigned long alt_div = 0, alt_div_mask = DIV_MASK; in exynos5433_cpuclk_pre_rate_change()
340 unsigned long div = 0, div_mask = DIV_MASK; in exynos5433_cpuclk_post_rate_change()
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| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-sdmmc-mux.c | 20 #define DIV_MASK GENMASK(7, 0) macro
25 #define get_max_div(d) DIV_MASK
26 #define get_div_field(val) ((val) & DIV_MASK)
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| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| H A D | clk-sdmmc-mux.c | 20 #define DIV_MASK GENMASK(7, 0) macro
25 #define get_max_div(d) DIV_MASK
26 #define get_div_field(val) ((val) & DIV_MASK)
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| /kernel/linux/linux-5.10/drivers/pinctrl/sirf/ |
| H A D | pinctrl-atlas7.c | 145 #define DIV_MASK 0x1 macro
4975 writel(DIV_MASK << mux->dinput_val_bit, in __atlas7_pmx_pin_input_disable_set()
4992 writel(DIV_MASK << mux->dinput_val_bit, in __atlas7_pmx_pin_input_disable_clr()
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