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Searched refs:DCN_BASE__INST0_SEG5 (Results 1 - 14 of 14) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn314.c38 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddmub_dcn315.c38 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddmub_dcn316.c38 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c50 #define DCN_BASE__INST0_SEG5 0 macro
H A Dhw_translate_dcn315.c43 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/irq/dcn315/
H A Dirq_service_dcn315.c43 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h272 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h272 #define DCN_BASE__INST0_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h368 #define DCN_BASE__INST0_SEG5 0 macro
H A Dbeige_goby_ip_offset.h446 #define DCN_BASE__INST0_SEG5 0 macro
H A Dyellow_carp_offset.h390 #define DCN_BASE__INST0_SEG5 0 macro
H A Dvangogh_ip_offset.h457 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c101 #define DCN_BASE__INST0_SEG5 0 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c99 #define DCN_BASE__INST0_SEG5 0 macro

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