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Help
Searched
refs:DCACHE_WAY_SIZE
(Results
1 - 18
of
18
) sorted by relevance
/kernel/linux/linux-5.10/arch/xtensa/include/asm/
H
A
D
cache.h
20
#define
DCACHE_WAY_SIZE
(XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
macro
26
#if
DCACHE_WAY_SIZE
>= ICACHE_WAY_SIZE
27
# define CACHE_WAY_SIZE
DCACHE_WAY_SIZE
H
A
D
shmparam.h
19
#define SHMLBA ((PAGE_SIZE >
DCACHE_WAY_SIZE
)? PAGE_SIZE :
DCACHE_WAY_SIZE
)
H
A
D
cacheflush.h
69
#if defined(CONFIG_MMU) && (
DCACHE_WAY_SIZE
> PAGE_SIZE)
95
((
DCACHE_WAY_SIZE
> PAGE_SIZE) || defined(CONFIG_SMP))
163
#if defined(CONFIG_MMU) && (
DCACHE_WAY_SIZE
> PAGE_SIZE)
H
A
D
pgtable.h
73
#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 +
DCACHE_WAY_SIZE
)
74
#if 2 *
DCACHE_WAY_SIZE
> ICACHE_WAY_SIZE
75
#define TLBTEMP_SIZE (2 *
DCACHE_WAY_SIZE
)
180
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
309
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
in update_pte()
H
A
D
page.h
62
* We use the address space VMALLOC_END ... VMALLOC_END +
DCACHE_WAY_SIZE
* 2
66
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
68
# define DCACHE_ALIAS_MASK (PAGE_MASK & (
DCACHE_WAY_SIZE
- 1))
140
#if defined(CONFIG_MMU) &&
DCACHE_WAY_SIZE
> PAGE_SIZE
H
A
D
highmem.h
30
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
/kernel/linux/linux-6.6/arch/xtensa/include/asm/
H
A
D
cache.h
20
#define
DCACHE_WAY_SIZE
(XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
macro
26
#if
DCACHE_WAY_SIZE
>= ICACHE_WAY_SIZE
27
# define CACHE_WAY_SIZE
DCACHE_WAY_SIZE
H
A
D
shmparam.h
19
#define SHMLBA ((PAGE_SIZE >
DCACHE_WAY_SIZE
)? PAGE_SIZE :
DCACHE_WAY_SIZE
)
H
A
D
cacheflush.h
69
#if defined(CONFIG_MMU) && (
DCACHE_WAY_SIZE
> PAGE_SIZE)
95
((
DCACHE_WAY_SIZE
> PAGE_SIZE) || defined(CONFIG_SMP))
168
#if defined(CONFIG_MMU) && (
DCACHE_WAY_SIZE
> PAGE_SIZE)
H
A
D
page.h
64
* We use the address space VMALLOC_END ... VMALLOC_END +
DCACHE_WAY_SIZE
* 2
68
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
70
# define DCACHE_ALIAS_MASK (PAGE_MASK & (
DCACHE_WAY_SIZE
- 1))
142
#if defined(CONFIG_MMU) &&
DCACHE_WAY_SIZE
> PAGE_SIZE
H
A
D
pgtable.h
71
#define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 +
DCACHE_WAY_SIZE
)
72
#if 2 *
DCACHE_WAY_SIZE
> ICACHE_WAY_SIZE
73
#define TLBTEMP_SIZE (2 *
DCACHE_WAY_SIZE
)
182
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
297
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
in update_pte()
H
A
D
highmem.h
30
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
/kernel/linux/linux-5.10/arch/xtensa/mm/
H
A
D
cache.c
58
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
213
#endif /*
DCACHE_WAY_SIZE
> PAGE_SIZE */
230
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
in update_mmu_cache()
263
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
H
A
D
highmem.c
17
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
/kernel/linux/linux-6.6/arch/xtensa/mm/
H
A
D
cache.c
58
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
212
#endif /*
DCACHE_WAY_SIZE
> PAGE_SIZE */
231
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
in update_mmu_cache_range()
269
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
H
A
D
highmem.c
15
#if
DCACHE_WAY_SIZE
> PAGE_SIZE
/kernel/linux/linux-5.10/arch/xtensa/kernel/
H
A
D
entry.S
1700
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
1764
#endif //
DCACHE_WAY_SIZE
> PAGE_SIZE
1831
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
/kernel/linux/linux-6.6/arch/xtensa/kernel/
H
A
D
entry.S
1729
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE)
1793
#endif //
DCACHE_WAY_SIZE
> PAGE_SIZE
1861
#if (
DCACHE_WAY_SIZE
> PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
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