Home
last modified time | relevance | path

Searched refs:DBUF_CTL_S (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dskl_watermark_regs.h139 #define DBUF_CTL_S(slice) _MMIO(_PICK(slice, \ macro
H A Dintel_display_power.c1063 i915_reg_t reg = DBUF_CTL_S(slice); in gen9_dbuf_slice_set()
1143 intel_de_rmw(dev_priv, DBUF_CTL_S(slice), in gen12_dbuf_slices_config()
H A Dskl_watermark.c50 if (intel_de_read(i915, DBUF_CTL_S(slice)) & DBUF_POWER_STATE) in intel_enabled_dbuf_slices_mask()
3474 * Configure MBUS_CTL and all DBUF_CTL_S of each slice to join_mbus state before
3507 intel_de_rmw(i915, DBUF_CTL_S(slice), in update_mbus_pre_enable()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c912 MMIO_D(DBUF_CTL_S(0)); in iterate_skl_plus_mmio()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2598 MMIO_DH(DBUF_CTL_S(0), D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write); in init_skl_mmio_info()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_display_power.c4693 i915_reg_t reg = DBUF_CTL_S(slice); in gen9_dbuf_slice_set()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2963 MMIO_DH(DBUF_CTL_S(0), D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write); in init_skl_mmio_info()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Dintel_pm.c3642 if (I915_READ(DBUF_CTL_S(i)) & DBUF_POWER_STATE) in intel_enabled_dbuf_slices_mask()
H A Di915_reg.h7938 #define DBUF_CTL_S(slice) _MMIO(_PICK_EVEN(slice, _DBUF_CTL_S1, _DBUF_CTL_S2)) macro

Completed in 72 milliseconds