Home
last modified time | relevance | path

Searched refs:CTRL_ENABLE (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-spear/
H A Dtime.c46 #define CTRL_ENABLE 0x0020 macro
88 val |= CTRL_ENABLE ; in spear_clocksource_init()
101 val &= ~CTRL_ENABLE; in timer_shutdown()
140 val |= CTRL_ENABLE | CTRL_INT_ENABLE; in spear_set_periodic()
162 if (val & CTRL_ENABLE) in clockevent_next_event()
163 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT)); in clockevent_next_event()
167 val |= CTRL_ENABLE | CTRL_INT_ENABLE; in clockevent_next_event()
/kernel/linux/linux-6.6/arch/arm/mach-spear/
H A Dtime.c43 #define CTRL_ENABLE 0x0020 macro
85 val |= CTRL_ENABLE ; in spear_clocksource_init()
98 val &= ~CTRL_ENABLE; in spear_timer_shutdown()
137 val |= CTRL_ENABLE | CTRL_INT_ENABLE; in spear_set_periodic()
159 if (val & CTRL_ENABLE) in clockevent_next_event()
160 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT)); in clockevent_next_event()
164 val |= CTRL_ENABLE | CTRL_INT_ENABLE; in clockevent_next_event()
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-apple-nco.c24 #define CTRL_ENABLE BIT(31) macro
83 writel_relaxed(val | CTRL_ENABLE, chan->base + REG_CTRL); in applnco_enable_nolock()
92 writel_relaxed(val & ~CTRL_ENABLE, chan->base + REG_CTRL); in applnco_disable_nolock()
99 return (readl_relaxed(chan->base + REG_CTRL) & CTRL_ENABLE) != 0; in applnco_is_enabled()
/kernel/linux/linux-5.10/drivers/pwm/
H A Dpwm-vt8500.c37 #define CTRL_ENABLE BIT(0) macro
139 val |= CTRL_ENABLE; in vt8500_pwm_enable()
152 val &= ~CTRL_ENABLE; in vt8500_pwm_disable()
/kernel/linux/linux-6.6/drivers/pwm/
H A Dpwm-vt8500.c34 #define CTRL_ENABLE BIT(0) macro
136 val |= CTRL_ENABLE; in vt8500_pwm_enable()
149 val &= ~CTRL_ENABLE; in vt8500_pwm_disable()
/kernel/linux/linux-5.10/drivers/iommu/
H A Dexynos-iommu.c129 #define CTRL_ENABLE 0x5 macro
288 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL); in sysmmu_unblock()
501 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL); in __sysmmu_enable()
/kernel/linux/linux-6.6/drivers/iommu/
H A Dexynos-iommu.c127 #define CTRL_ENABLE 0x5 macro
426 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL); in sysmmu_unblock()
655 writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL); in __sysmmu_enable()
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
H A Dtegra-xudc.c61 #define CTRL_ENABLE BIT(31) macro
2045 val |= CTRL_ENABLE; in tegra_xudc_gadget_pullup()
2047 val &= ~CTRL_ENABLE; in tegra_xudc_gadget_pullup()
2100 val |= CTRL_ENABLE; in tegra_xudc_gadget_start()
2134 val &= ~(CTRL_IE | CTRL_ENABLE); in tegra_xudc_gadget_stop()
/kernel/linux/linux-6.6/drivers/usb/gadget/udc/
H A Dtegra-xudc.c60 #define CTRL_ENABLE BIT(31) macro
2057 val |= CTRL_ENABLE; in tegra_xudc_gadget_pullup()
2059 val &= ~CTRL_ENABLE; in tegra_xudc_gadget_pullup()
2112 val |= CTRL_ENABLE; in tegra_xudc_gadget_start()
2146 val &= ~(CTRL_IE | CTRL_ENABLE); in tegra_xudc_gadget_stop()

Completed in 17 milliseconds