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Help
Searched
refs:CTL_LAYER
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
H
A
D
dpu_hw_ctl.c
11
#define
CTL_LAYER
(lm) \
macro
345
DPU_REG_WRITE(c,
CTL_LAYER
(mixer_id), 0);
in dpu_hw_ctl_clear_all_blendstages()
480
DPU_REG_WRITE(c,
CTL_LAYER
(lm), mixercfg);
in dpu_hw_ctl_setup_blendstage()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
H
A
D
dpu_hw_ctl.c
12
#define
CTL_LAYER
(lm) \
macro
409
DPU_REG_WRITE(c,
CTL_LAYER
(mixer_id), 0);
in dpu_hw_ctl_clear_all_blendstages()
482
*
CTL_LAYER
has 3-bit field (and extra bits in EXT register),
in dpu_hw_ctl_setup_blendstage()
497
DPU_REG_WRITE(c,
CTL_LAYER
(lm), mixercfg[0]);
in dpu_hw_ctl_setup_blendstage()
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