Searched refs:CP_ME2_PIPE0_INT_CNTL (Results 1 - 8 of 8) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1362 #define CP_ME2_PIPE0_INT_CNTL 0xC224 macro
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H A D | cik.c | 6883 WREG32(CP_ME2_PIPE0_INT_CNTL, 0); in cik_disable_interrupt_state() 7066 cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7237 WREG32(CP_ME2_PIPE0_INT_CNTL, cp_m2p0); in cik_irq_set()
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | cikd.h | 1362 #define CP_ME2_PIPE0_INT_CNTL 0xC224 macro
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H A D | cik.c | 6872 WREG32(CP_ME2_PIPE0_INT_CNTL, 0); in cik_disable_interrupt_state() 7055 cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE; in cik_irq_set() 7226 WREG32(CP_ME2_PIPE0_INT_CNTL, cp_m2p0); in cik_irq_set()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v10_0.c | 8492 tmp = REG_SET_FIELD(tmp, CP_ME2_PIPE0_INT_CNTL, in gfx_v10_0_kiq_set_interrupt_state() 8502 tmp = REG_SET_FIELD(tmp, CP_ME2_PIPE0_INT_CNTL, in gfx_v10_0_kiq_set_interrupt_state()
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H A D | gfx_v8_0.c | 6590 WREG32_FIELD(CP_ME2_PIPE0_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, in gfx_v8_0_set_cp_ecc_int_state()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v10_0.c | 9066 tmp = REG_SET_FIELD(tmp, CP_ME2_PIPE0_INT_CNTL, in gfx_v10_0_kiq_set_interrupt_state() 9076 tmp = REG_SET_FIELD(tmp, CP_ME2_PIPE0_INT_CNTL, in gfx_v10_0_kiq_set_interrupt_state()
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H A D | gfx_v8_0.c | 6562 WREG32_FIELD(CP_ME2_PIPE0_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, in gfx_v8_0_set_cp_ecc_int_state()
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