CPLL_CFG0_PLL_DIV_RATIO_SHIFT (reference) in projects: kernel - OpenGrok search results

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Searched refs:CPLL_CFG0_PLL_DIV_RATIO_SHIFT (Results 1 - 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ralink/
H A D	mt7620.h	`62 #define CPLL_CFG0_PLL_DIV_RATIO_SHIFT 10 macro`
/kernel/linux/linux-6.6/drivers/clk/ralink/
H A D	clk-mtmips.c	`67 #define CPLL_CFG0_PLL_DIV_RATIO_SHIFT 10 macro 562 div = (t >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & in mt7620_pll_recalc_rate()`
/kernel/linux/linux-5.10/arch/mips/ralink/
H A D	mt7620.c	`427 div = (reg >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & in mt7620_get_cpu_pll_rate()`

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