Searched refs:CNTR_INVALID_VL (Results 1 - 8 of 8) sorted by relevance
/kernel/linux/linux-5.10/drivers/infiniband/hw/hfi1/ |
H A D | mad.c | 2706 read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL); in get_xmit_wait_counters() 2767 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2773 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2775 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2777 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2779 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2782 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2785 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2797 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2799 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL)); in pma_get_opa_portstatus() [all...] |
H A D | chip.c | 1418 if (vl == CNTR_INVALID_VL) in dev_access_u32_csr() 1422 if (vl != CNTR_INVALID_VL) in dev_access_u32_csr() 1478 if (vl == CNTR_INVALID_VL) in dev_access_u64_csr() 1482 if (vl != CNTR_INVALID_VL) in dev_access_u64_csr() 1497 if (vl != CNTR_INVALID_VL) in dc_access_lcb_cntr() 1519 if (vl != CNTR_INVALID_VL) in port_access_u32_csr() 1532 if (vl == CNTR_INVALID_VL) in port_access_u64_csr() 1536 if (vl != CNTR_INVALID_VL) in port_access_u64_csr() 1569 if (vl != CNTR_INVALID_VL) in access_sw_link_dn_cnt() 1579 if (vl != CNTR_INVALID_VL) in access_sw_link_up_cnt() [all...] |
H A D | pcie.c | 602 words = read_port_cntr(dd->pport, C_RX_WORDS, CNTR_INVALID_VL); in pci_mmio_enabled()
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H A D | hfi.h | 703 #define CNTR_INVALID_VL -1 /* Specifies invalid VL */ macro
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/kernel/linux/linux-6.6/drivers/infiniband/hw/hfi1/ |
H A D | mad.c | 2664 read_port_cntr(ppd, C_TX_WAIT, CNTR_INVALID_VL); in get_xmit_wait_counters() 2725 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2731 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2733 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2735 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2737 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2740 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2743 CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2755 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_FCN, CNTR_INVALID_VL)); in pma_get_opa_portstatus() 2757 cpu_to_be64(read_dev_cntr(dd, C_DC_RCV_BCN, CNTR_INVALID_VL)); in pma_get_opa_portstatus() [all...] |
H A D | chip.c | 1377 if (vl == CNTR_INVALID_VL) in dev_access_u32_csr() 1381 if (vl != CNTR_INVALID_VL) in dev_access_u32_csr() 1437 if (vl == CNTR_INVALID_VL) in dev_access_u64_csr() 1441 if (vl != CNTR_INVALID_VL) in dev_access_u64_csr() 1456 if (vl != CNTR_INVALID_VL) in dc_access_lcb_cntr() 1479 if (vl != CNTR_INVALID_VL) in port_access_u32_csr() 1492 if (vl == CNTR_INVALID_VL) in port_access_u64_csr() 1496 if (vl != CNTR_INVALID_VL) in port_access_u64_csr() 1529 if (vl != CNTR_INVALID_VL) in access_sw_link_dn_cnt() 1539 if (vl != CNTR_INVALID_VL) in access_sw_link_up_cnt() [all...] |
H A D | pcie.c | 551 words = read_port_cntr(dd->pport, C_RX_WORDS, CNTR_INVALID_VL); in pci_mmio_enabled()
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H A D | hfi.h | 662 #define CNTR_INVALID_VL -1 /* Specifies invalid VL */ macro
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