CLK_TOP_APLL_DIV0 (reference) in projects: kernel - OpenGrok search results

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Searched refs:CLK_TOP_APLL_DIV0 (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt2712-clk.h	`201 #define CLK_TOP_APLL_DIV0 170 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	mt2712-clk.h	`201 #define CLK_TOP_APLL_DIV0 170 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	mt2712-clk.h	`201 #define CLK_TOP_APLL_DIV0 170 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt2712-clk.h	`201 #define CLK_TOP_APLL_DIV0 170 macro`
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A D	clk-mt2712.c	`793 DIV_ADJ(CLK_TOP_APLL_DIV0, "apll_div0", "i2so1_sel", 0x124, 0, 8),`
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A D	clk-mt2712.c	`938 DIV_ADJ(CLK_TOP_APLL_DIV0, "apll_div0", "i2so1_sel", 0x124, 0, 8),`

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