CLK_PCLK_DDR_PHY0 (reference) in projects: kernel - OpenGrok search results

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Searched refs:CLK_PCLK_DDR_PHY0 (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	exynos5433.h	`376 #define CLK_PCLK_DDR_PHY0 179 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	exynos5433.h	`376 #define CLK_PCLK_DDR_PHY0 179 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	exynos5433.h	`372 #define CLK_PCLK_DDR_PHY0 179 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	exynos5433.h	`372 #define CLK_PCLK_DDR_PHY0 179 macro`
/kernel/linux/linux-5.10/drivers/clk/samsung/
H A D	clk-exynos5433.c	`1468 GATE(CLK_PCLK_DDR_PHY0, "pclk_ddr_phy0", "div_aclk_mif_133",`
/kernel/linux/linux-6.6/drivers/clk/samsung/
H A D	clk-exynos5433.c	`1491 GATE(CLK_PCLK_DDR_PHY0, "pclk_ddr_phy0", "div_aclk_mif_133",`

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