CLKID_VCLK2_DIV1 (reference) in projects: kernel

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Searched refs:CLKID_VCLK2_DIV1 (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	gxbb-clkc.h	`139 #define CLKID_VCLK2_DIV1 190 macro`
H A D	g12a-clkc.h	`118 #define CLKID_VCLK2_DIV1 153 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	gxbb-clkc.h	`139 #define CLKID_VCLK2_DIV1 190 macro`
H A D	g12a-clkc.h	`118 #define CLKID_VCLK2_DIV1 153 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	axg-clkc.h	`137 #define CLKID_VCLK2_DIV1 127 macro`
H A D	gxbb-clkc.h	`198 #define CLKID_VCLK2_DIV1 190 macro`
H A D	meson8b-clkc.h	`158 #define CLKID_VCLK2_DIV1 151 macro`
H A D	g12a-clkc.h	`164 #define CLKID_VCLK2_DIV1 153 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	axg-clkc.h	`137 #define CLKID_VCLK2_DIV1 127 macro`
H A D	meson8b-clkc.h	`158 #define CLKID_VCLK2_DIV1 151 macro`
H A D	gxbb-clkc.h	`198 #define CLKID_VCLK2_DIV1 190 macro`
H A D	g12a-clkc.h	`164 #define CLKID_VCLK2_DIV1 153 macro`
/kernel/linux/linux-5.10/drivers/clk/meson/
H A D	meson8b.h	`130 #define CLKID_VCLK2_DIV1 151 macro`
H A D	meson8b.c	`2868 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw, 3075 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw, 3293 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,`
H A D	gxbb.c	`2917 [CLKID_VCLK2_DIV1] = &gxbb_vclk2_div1.hw, 3128 [CLKID_VCLK2_DIV1] = &gxbb_vclk2_div1.hw,`
H A D	g12a.c	`4331 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw, 4557 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw, 4812 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw,`
/kernel/linux/linux-6.6/drivers/clk/meson/
H A D	meson8b.c	`2929 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw, 3133 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw, 3348 [CLKID_VCLK2_DIV1] = &meson8b_vclk2_div1_gate.hw,`
H A D	gxbb.c	`2919 [CLKID_VCLK2_DIV1] = &gxbb_vclk2_div1.hw, 3126 [CLKID_VCLK2_DIV1] = &gxbb_vclk2_div1.hw,`
H A D	g12a.c	`4395 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw, 4620 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw, 4880 [CLKID_VCLK2_DIV1] = &g12a_vclk2_div1.hw,`
H A D	axg.c	`2022 [CLKID_VCLK2_DIV1] = &axg_vclk2_div1.hw,`

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