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Searched refs:CLASS2_MAILBOX_INTR (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/arch/powerpc/platforms/cell/
H A Dspu_base.c351 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR; in spu_irq_class_2()
368 if (stat & CLASS2_MAILBOX_INTR) in spu_irq_class_2()
/kernel/linux/linux-6.6/arch/powerpc/platforms/cell/
H A Dspu_base.c344 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR; in spu_irq_class_2()
361 if (stat & CLASS2_MAILBOX_INTR) in spu_irq_class_2()
/kernel/linux/linux-5.10/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c64 spu_int_stat_clear(spu, 2, CLASS2_MAILBOX_INTR); in spu_hw_mbox_stat_poll()
H A Dbacking_ops.c96 ~CLASS2_MAILBOX_INTR; in spu_backing_mbox_stat_poll()
/kernel/linux/linux-6.6/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c64 spu_int_stat_clear(spu, 2, CLASS2_MAILBOX_INTR); in spu_hw_mbox_stat_poll()
H A Dbacking_ops.c96 ~CLASS2_MAILBOX_INTR; in spu_backing_mbox_stat_poll()
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
H A Dspu.h525 #define CLASS2_MAILBOX_INTR 0x1L macro
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
H A Dspu.h492 #define CLASS2_MAILBOX_INTR 0x1L macro

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