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Searched refs:BIT14 (Results 1 - 25 of 36) sorted by relevance

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/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h214 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
242 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
H A Dhal_com_reg.h622 #define RRSR_MCS2 BIT14
790 #define IMR_PSTIMEOUT BIT14 /* Power save time out interrupt */
838 #define PHIMR_BCNDMAINT_E BIT14
889 #define UHIMR_BCNDMAINT_E BIT14
944 #define IMR_BCNDMAINT_E_88E BIT14 /* Beacon DMA Interrupt Extension for Win7 */
973 #define IMR_BCNDOK1_88E BIT14 /* Beacon Queue DMA OK Interrup 1 */
1037 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */
H A Dosdep_service.h35 #define BIT14 0x00004000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h202 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
230 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
H A Dosdep_service.h31 #define BIT14 0x00004000 macro
H A Dhal_com_reg.h561 #define RRSR_MCS2 BIT14
701 #define IMR_PSTIMEOUT BIT14 /* Power save time out interrupt */
748 #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h45 #define BIT14 0x00004000 macro
/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h45 #define BIT14 0x00004000 macro
/kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h214 #define IMR_TIMEOUT0 BIT14
245 #define TPPoll_StopHigh BIT14
375 #define RRSR_MCS2 BIT14
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h396 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
424 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
H A Dodm_debug.h75 #define ODM_COMP_MP BIT14
/kernel/linux/linux-6.6/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h391 #define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */
419 #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */
/kernel/linux/linux-5.10/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h24 #define BIT14 0x00004000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h24 #define BIT14 0x00004000 macro
/kernel/linux/linux-5.10/include/uapi/linux/
H A Dsynclink.h33 #define BIT14 0x4000 macro
/kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h108 #define IMR_TIMEOUT0 BIT14
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dsynclink.h33 #define BIT14 0x4000 macro
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
H A Dsynclink.h37 #define BIT14 0x4000 macro
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
H A Dsynclink.h24 #define BIT14 0x4000 macro
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
H A Dsynclink.h37 #define BIT14 0x4000 macro
/kernel/linux/linux-5.10/drivers/tty/
H A Dsynclink.c557 #define MISCSTATUS_RXC BIT14
577 #define SICR_RXC_INACTIVE BIT14
578 #define SICR_RXC (BIT15|BIT14)
1838 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
4550 RegValue |= BIT14; in usc_set_sdlc_mode()
4554 RegValue |= BIT15 | BIT14; in usc_set_sdlc_mode()
4594 case HDLC_ENCODING_NRZI_MARK: RegValue |= BIT14; break; in usc_set_sdlc_mode()
4595 case HDLC_ENCODING_NRZI_SPACE: RegValue |= BIT14 | BIT13; break; in usc_set_sdlc_mode()
4598 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14; break; in usc_set_sdlc_mode()
4599 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 | BIT14 | BIT1 in usc_set_sdlc_mode()
[all...]
H A Dsynclink_gt.c357 #define MASK_BREAK BIT14
384 #define RXIDLE BIT14
385 #define RXBREAK BIT14
3925 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
3933 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
4160 val = BIT15 + BIT14 + BIT0; in async_mode()
4214 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4289 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4396 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
/kernel/linux/linux-6.6/drivers/scsi/
H A Ddc395x.h62 #define BIT14 0x00004000 macro
/kernel/linux/linux-6.6/drivers/tty/
H A Dsynclink_gt.c352 #define MASK_BREAK BIT14
379 #define RXIDLE BIT14
380 #define RXBREAK BIT14
3885 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
3893 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
4120 val = BIT15 + BIT14 + BIT0; in async_mode()
4174 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4249 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()
4356 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
/kernel/linux/linux-5.10/drivers/scsi/
H A Ddc395x.h62 #define BIT14 0x00004000 macro

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