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Searched refs:AZX_GCTL_RESET (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/sound/hda/
H A Dhdac_controller.c410 snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_RESET, 0); in snd_hdac_bus_enter_link_reset()
413 while ((snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) && in snd_hdac_bus_enter_link_reset()
429 snd_hdac_chip_updateb(bus, GCTL, AZX_GCTL_RESET, AZX_GCTL_RESET); in snd_hdac_bus_exit_link_reset()
444 if (snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) in snd_hdac_bus_reset_link()
/kernel/linux/linux-6.6/sound/hda/
H A Dhdac_controller.c394 snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_RESET, 0); in snd_hdac_bus_enter_link_reset()
397 while ((snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) && in snd_hdac_bus_enter_link_reset()
413 snd_hdac_chip_updateb(bus, GCTL, AZX_GCTL_RESET, AZX_GCTL_RESET); in snd_hdac_bus_exit_link_reset()
428 if (snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) in snd_hdac_bus_reset_link()
/kernel/linux/linux-5.10/include/sound/
H A Dhda_register.h25 #define AZX_GCTL_RESET (1 << 0) /* controller reset */ macro
/kernel/linux/linux-6.6/include/sound/
H A Dhda_register.h25 #define AZX_GCTL_RESET (1 << 0) /* controller reset */ macro
/kernel/linux/linux-5.10/sound/soc/intel/skylake/
H A Dskl.c202 if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) { in skl_dum_set()
/kernel/linux/linux-6.6/sound/soc/intel/skylake/
H A Dskl.c202 if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) { in skl_dum_set()

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