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Searched refs:AR_PHY_CL_CAL_CTL (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
H A Dar9002_calib.c751 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
753 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); in ar9285_hw_cl_cal()
767 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); in ar9285_hw_cl_cal()
768 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
783 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
H A Dar9003_calib.c372 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_dynamic_osdac_selection()
1445 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1448 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1481 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1504 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1595 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9003_hw_init_cal_soc()
H A Dar9002_phy.h556 #define AR_PHY_CL_CAL_CTL 0xA358 macro
H A Dar9003_phy.h481 #define AR_PHY_CL_CAL_CTL (AR_SM_BASE + 0xd8) macro
H A Dar9003_phy.c730 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) in ar9003_hw_override_ini()
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/
H A Dar9002_calib.c751 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
753 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); in ar9285_hw_cl_cal()
767 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); in ar9285_hw_cl_cal()
768 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
783 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9285_hw_cl_cal()
H A Dar9003_calib.c372 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_dynamic_osdac_selection()
1441 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1444 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, in ar9003_hw_init_cal_pcoem()
1477 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1500 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) { in ar9003_hw_init_cal_pcoem()
1591 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); in ar9003_hw_init_cal_soc()
H A Dar9002_phy.h556 #define AR_PHY_CL_CAL_CTL 0xA358 macro
H A Dar9003_phy.h481 #define AR_PHY_CL_CAL_CTL (AR_SM_BASE + 0xd8) macro
H A Dar9003_phy.c721 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) in ar9003_hw_override_ini()

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