Home
last modified time | relevance | path

Searched refs:x400 (Results 1 - 25 of 106) sorted by relevance

12345

/device/soc/rockchip/common/sdk_linux/kernel/sched/
H A Dpelt.c116 c2 = LOAD_AVG_MAX - decay_load(LOAD_AVG_MAX, periods) - 0x400; in __accumulate_pelt_segments()
149 periods = delta / 0x400; /* A period is 1024us (~1ms) */ in accumulate_sum()
162 delta %= 0x400; in accumulate_sum()
174 contrib = __accumulate_pelt_segments(periods, 0x400 - sa->period_contrib, delta); in accumulate_sum()
/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/lwip_sack/include/netif/
H A Difaddrs.h69 #define IFF_DRV_OACTIVE 0x400
193 #define RTF_LLINFO 0x400
195 #define RTF_LLDATA 0x400
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/sysconfig/
H A Dsys_config.c609 sys_writel(g_reg_iocfg_base + 0x0028, 0x400); in vi_mipi_rx_mux()
610 sys_writel(g_reg_iocfg_base + 0x002C, 0x400); in vi_mipi_rx_mux()
611 sys_writel(g_reg_iocfg_base + 0x0030, 0x400); in vi_mipi_rx_mux()
612 sys_writel(g_reg_iocfg_base + 0x0034, 0x400); in vi_mipi_rx_mux()
613 sys_writel(g_reg_iocfg_base + 0x0038, 0x400); in vi_mipi_rx_mux()
614 sys_writel(g_reg_iocfg_base + 0x003C, 0x400); in vi_mipi_rx_mux()
615 sys_writel(g_reg_iocfg_base + 0x0018, 0x400); in vi_mipi_rx_mux()
616 sys_writel(g_reg_iocfg_base + 0x001C, 0x400); in vi_mipi_rx_mux()
617 sys_writel(g_reg_iocfg_base + 0x0020, 0x400); in vi_mipi_rx_mux()
618 sys_writel(g_reg_iocfg_base + 0x0024, 0x400); in vi_mipi_rx_mux()
[all...]
/device/board/hisilicon/hispark_aries/liteos_a/board/include/hisoc/
H A Dcpu.h42 #define ARM_GIC_DIST_PRI 0x400
/device/board/hisilicon/hispark_taurus/liteos_a/board/include/hisoc/
H A Dcpu.h42 #define ARM_GIC_DIST_PRI 0x400
/device/soc/hisilicon/hi3861v100/sdk_liteos/include/
H A Dhi_os_stat.h41 #define HI_OS_STAT_START_TIMER_FAIL 0x400 /**< Invalid input argument.CNcomment:入参错误 CNend */
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/
H A Dpoll.h25 #define POLLMSG 0x400
H A Dnetdb.h33 #define AI_NUMERICSERV 0x400
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oal/
H A Dstack.h66 #define PSM_SAVE_PHY_OFFSET 0x400
H A Dplat_board_adapt.h45 #define REG_GIPO_DIR (IO_MUX_REG_BASE + 0x400)
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/hw/include/liteos/
H A Dmtd-abi.h57 #define MTD_WRITEABLE 0x400
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/sys/
H A Depoll.h28 #define EPOLLMSG 0x400
H A Dfanotify.h51 #define FAN_DELETE_SELF 0x400
/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/
H A Dbcmsdpcm.h60 #define SMB_DATA_DSNACK 0x400 /* host nacking a deepsleep request */
98 #define HMB_DATA_D3ACK 0x400 /* firmware acking a D3 notice from host */
H A Dpcicfg.h284 #define PCI_PMCR_TREFUP_MAX 0x400
350 #define SPROM_CFG_TO_SB_RST 0x400 /* backplane reset */
H A Dbcmnvram.h281 #define NVRAM_START_COMPRESSED 0x400
/device/soc/rockchip/rk3399/hardware/mpp/include/
H A Dmpp_service.h84 MPP_CMD_CONTROL_BASE = 0x400,
/device/soc/rockchip/rk3568/hardware/mpp/include/
H A Dmpp_service.h84 MPP_CMD_CONTROL_BASE = 0x400,
/device/soc/rockchip/rk3568/hardware/omx_il/include/khronos/
H A DVideoExt.h120 OMX_VIDEO_VP9Level52 = 0x400,
/device/soc/rockchip/rk3588/hardware/mpp/include/
H A Dmpp_service.h86 MPP_CMD_CONTROL_BASE = 0x400,
/device/soc/rockchip/common/hardware/mpp/include/
H A Dmpp_service.h84 MPP_CMD_CONTROL_BASE = 0x400,
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/lzmaram/
H A Dlzmaram.c205 malloc_size[4] = 0x400; /* for security ,index 4:0x400 */ in hi_lzma_mem_detect()
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/net/
H A Dif.h160 #define IFF_MASTER 0x400
/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/include/
H A Dhi_drv_gpio.h80 #define HI_GPIO_DIR_REG 0x400
/device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/common/
H A Dmali_dlbu.c24 #define MALI_DLBU_SIZE 0x400

Completed in 13 milliseconds

12345