| /device/soc/rockchip/common/vendor/drivers/rockchip/ |
| H A D | sdmmc_vendor_storage.c | 58 u8 data[EMMC_VENDOR_PART_SIZE * 0x200 - 0x400 - 0x8];
85 ret = rk_emmc_transfer(buffer + i * 0x200, addr + i, 0x200, write);
in emmc_vendor_ops()
101 if (rk_emmc_transfer(p_buf, EMMC_VENDOR_PART_START + EMMC_VENDOR_PART_SIZE * i, 0x200, 0)) {
in emmc_vendor_storage_init()
105 p_buf += (EMMC_VENDOR_PART_SIZE - 1) * 0x200;
in emmc_vendor_storage_init()
106 if (rk_emmc_transfer(p_buf, EMMC_VENDOR_PART_START + EMMC_VENDOR_PART_SIZE * (i + 1) - 1, 0x200, 0)) {
in emmc_vendor_storage_init()
246 ret = rk_emmc_transfer(buf + i * 0x200, index + i, 0x200, 0);
in id_blk_read_data()
264 ret = rk_emmc_transfer(buf + i * 0x200, index + i, 0x200, in id_blk_write_data()
[all...] |
| /device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/sys/ |
| H A D | fanotify.h | 50 #define FAN_DELETE 0x200
72 #define FAN_REPORT_FID 0x200
|
| H A D | epoll.h | 27 #define EPOLLWRBAND 0x200
|
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/hi_adc/arch/hi3516cv500/ |
| H A D | hi_adc_hal.h | 39 #define TIME_SCAN 0x200
|
| /device/soc/rockchip/rk3568/hardware/mpp/mpp/legacy/inc/ |
| H A D | mpp_dec_cb_param.h | 30 ENC_CALLBACK_BASE = 0x200,
|
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hifb/drv/hi3516cv500/ |
| H A D | hifb_def.h | 46 #define VID_REGS_LEN 0x200 /* len of VID regs */
47 #define GRF_REGS_LEN 0x200 /* len of GFX regs */
53 #define FDR_VID_OFFSET (0x200 / 4) /* 0x200 bytes, 0x200/4 U32 */
54 #define FDR_GFX_OFFSET (0x200 / 4)
55 #define CAP_WBC_OFFSET (0x200 / 4)
|
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/include/ |
| H A D | vou_def.h | 45 #define VID_REGS_LEN 0x200 /* len of VID regs */
46 #define GRF_REGS_LEN 0x200 /* len of GFX regs */
52 #define FDR_VID_OFFSET (0x200 / 4)
53 #define FDR_GFX_OFFSET (0x200 / 4)
54 #define CAP_WBC_OFFSET (0x200 / 4)
|
| /device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/ |
| H A D | fcntl.h | 187 #define AT_REMOVEDIR 0x200
189 #define AT_EACCESS 0x200
|
| H A D | poll.h | 22 #define POLLWRBAND 0x200
|
| /device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/lwip_sack/include/netif/ |
| H A D | ifaddrs.h | 67 #define IFF_ALLMULTI 0x200
190 #define RTF_XRESOLVE 0x200
|
| /device/board/hisilicon/hispark_aries/liteos_a/board/include/hisoc/ |
| H A D | cpu.h | 39 #define ARM_GIC_DIST_PENDING_SET 0x200
|
| /device/board/hisilicon/hispark_taurus/liteos_a/board/include/hisoc/ |
| H A D | cpu.h | 39 #define ARM_GIC_DIST_PENDING_SET 0x200
|
| /device/soc/hisilicon/hi3861v100/sdk_liteos/include/ |
| H A D | hi_os_stat.h | 40 #define HI_OS_STAT_SLEEP_FAIL 0x200 /**< Used in the interrupt context.CNcomment:中断上下文使用CNend */
|
| /device/soc/rockchip/rk2206/sdk_liteos/liteos_m/ |
| H A D | target_config.h | 137 #define LOSCFG_ARCH_HWI_VECTOR_ALIGN 0x200
|
| /device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
| H A D | event_log.h | 52 #define EVENT_LOG_WL_BLOCK_SIZE 0x200
53 #define EVENT_LOG_PSM_BLOCK_SIZE 0x200
54 #define EVENT_LOG_BUS_BLOCK_SIZE 0x200
55 #define EVENT_LOG_ERROR_BLOCK_SIZE 0x200
|
| H A D | bcmsdpcm.h | 59 #define SMB_DATA_DSACK 0x200 /* host acking a deepsleep request */
97 #define HMB_DATA_DSEXIT 0x200 /* firmware announcing deepsleep exit */
|
| H A D | aidmp.h | 145 uint32 oobsynca; /* 0x200 */
246 #define OOB_ENABLEA0 0x200
289 #define AI_OOBSYNCA 0x200
|
| /device/soc/rockchip/rk3399/hardware/mpp/include/ |
| H A D | mpp_service.h | 71 MPP_CMD_SEND_BASE = 0x200,
|
| /device/soc/rockchip/rk3568/hardware/mpp/include/ |
| H A D | mpp_service.h | 71 MPP_CMD_SEND_BASE = 0x200,
|
| /device/soc/rockchip/rk3568/hardware/omx_il/include/khronos/ |
| H A D | VideoExt.h | 119 OMX_VIDEO_VP9Level51 = 0x200,
|
| /device/soc/rockchip/rk3588/hardware/mpp/include/ |
| H A D | mpp_service.h | 72 MPP_CMD_SEND_BASE = 0x200,
|
| /device/soc/rockchip/common/hardware/mpp/include/ |
| H A D | mpp_service.h | 71 MPP_CMD_SEND_BASE = 0x200,
|
| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk.h | 62 #define PX30_CLKGATE_CON(x) ((x)*0x4 + 0x200)
98 #define RV1126_PMU_SOFTRST_CON(x) ((x)*0x4 + 0x200)
172 #define RK3288_SDMMC_CON0 0x200
196 #define RK3328_CLKGATE_CON(x) ((x)*0x4 + 0x200)
214 #define RK3368_CLKGATE_CON(x) ((x)*0x4 + 0x200)
274 #define RK3568_PMU_SOFTRST_CON(x) ((x)*0x4 + 0x200)
|
| /device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/ |
| H A D | clk.h | 63 #define PX30_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
99 #define RV1126_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x200)
173 #define RK3288_SDMMC_CON0 0x200
197 #define RK3328_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
215 #define RK3368_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
275 #define RK3568_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x200)
|
| /device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/ |
| H A D | clk.h | 63 #define PX30_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
99 #define RV1126_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x200)
173 #define RK3288_SDMMC_CON0 0x200
197 #define RK3328_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
215 #define RK3368_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
275 #define RK3568_PMU_SOFTRST_CON(x) ((x) * 0x4 + 0x200)
|