| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-half-divider.c | 22 static unsigned long clk_half_divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in clk_half_divider_recalc_rate() argument
31 return DIV_ROUND_UP_ULL(((u64)parent_rate * 0x2), val); in clk_half_divider_recalc_rate()
38 unsigned long parent_rate, best = 0, now, maxdiv; in clk_half_divider_bestdiv() local
48 parent_rate = *best_parent_rate; in clk_half_divider_bestdiv()
49 bestdiv = DIV_ROUND_UP_ULL(((u64)parent_rate * 0x2), rate); in clk_half_divider_bestdiv()
69 parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), ((u64)rate * (i * 0x2 + 0x3)) / 0x2); in clk_half_divider_bestdiv()
70 now = DIV_ROUND_UP_ULL(((u64)parent_rate * 0x2), (i * 0x2 + 0x3)); in clk_half_divider_bestdiv()
75 *best_parent_rate = parent_rate; in clk_half_divider_bestdiv()
97 static int clk_half_divider_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in clk_half_divider_set_rate() argument
104 value = DIV_ROUND_UP_ULL(((u64)parent_rate * in clk_half_divider_set_rate()
[all...] |
| H A D | clk.c | 165 static void rockchip_fractional_approximation(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate, in rockchip_fractional_approximation() argument
178 *parent_rate = p_rate; in rockchip_fractional_approximation()
181 *parent_rate = p_parent_rate; in rockchip_fractional_approximation()
184 *parent_rate = p_parent_rate / div; in rockchip_fractional_approximation()
188 if (*parent_rate < rate * 0x14) { in rockchip_fractional_approximation()
194 if (!(*parent_rate % rate)) { in rockchip_fractional_approximation()
196 *n = *parent_rate / rate; in rockchip_fractional_approximation()
200 *parent_rate, rate); in rockchip_fractional_approximation()
209 * Get rate closer to *parent_rate to guarantee there is no overflow in rockchip_fractional_approximation()
213 scale = fls_long(*parent_rate / rat in rockchip_fractional_approximation()
[all...] |
| H A D | clk-ddr.c | 76 static unsigned long rockchip_ddrclk_sip_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in rockchip_ddrclk_sip_recalc_rate() argument
137 static unsigned long rockchip_ddrclk_scpi_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in rockchip_ddrclk_scpi_recalc_rate() argument
181 static unsigned long rockchip_ddrclk_sip_recalc_rate_v2(struct clk_hw *hw, unsigned long parent_rate) in rockchip_ddrclk_sip_recalc_rate_v2() argument
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| H A D | clk-cpu.c | 86 static unsigned long rockchip_cpuclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in rockchip_cpuclk_recalc_rate() argument
94 return parent_rate / (clksel0 + 1); in rockchip_cpuclk_recalc_rate()
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| /device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_vop2_clk.c | 132 static unsigned long clk_virtual_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in clk_virtual_recalc_rate() argument
148 static int clk_virtual_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in clk_virtual_set_rate() argument
191 static int vop2_div_get_val(unsigned long rate, unsigned long parent_rate) in vop2_div_get_val() argument
195 div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in vop2_div_get_val()
202 static unsigned long vop2_clk_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in vop2_clk_div_recalc_rate() argument
209 rate = parent_rate / div; in vop2_clk_div_recalc_rate()
211 cru_dbg("%s rate: %ld(prate: %ld)\n", clk_hw_get_name(hw), rate, parent_rate); in vop2_clk_div_recalc_rate()
243 static int vop2_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in vop2_clk_div_set_rate() argument
248 div_val = vop2_div_get_val(rate, parent_rate); in vop2_clk_div_set_rate()
251 cru_dbg("%s prate: %ld rate: %ld div_val: %d\n", clk_hw_get_name(hw), parent_rate, rat in vop2_clk_div_set_rate()
[all...] |
| /device/soc/rockchip/rk3588/kernel/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_vop2_clk.c | 146 unsigned long parent_rate) in clk_virtual_recalc_rate()
164 unsigned long parent_rate) in clk_virtual_set_rate()
209 static int vop2_div_get_val(unsigned long rate, unsigned long parent_rate) in vop2_div_get_val() argument
213 div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in vop2_div_get_val()
221 unsigned long parent_rate) in vop2_clk_div_recalc_rate()
228 rate = parent_rate / div; in vop2_clk_div_recalc_rate()
230 cru_dbg("%s rate: %ld(prate: %ld)\n", clk_hw_get_name(hw), rate, parent_rate); in vop2_clk_div_recalc_rate()
259 static int vop2_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in vop2_clk_div_set_rate() argument
264 div_val = vop2_div_get_val(rate, parent_rate); in vop2_clk_div_set_rate()
268 clk_hw_get_name(hw), parent_rate, rat in vop2_clk_div_set_rate()
145 clk_virtual_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) clk_virtual_recalc_rate() argument
163 clk_virtual_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_virtual_set_rate() argument
220 vop2_clk_div_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) vop2_clk_div_recalc_rate() argument
[all...] |
| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-dclk-divider.c | 17 static unsigned long clk_dclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in clk_dclk_recalc_rate() argument
25 return DIV_ROUND_UP_ULL(((u64)parent_rate), val + 1); in clk_dclk_recalc_rate()
42 static int clk_dclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) in clk_dclk_set_rate() argument
49 value = divider_get_val(rate, parent_rate, divider->table, divider->width, divider->flags); in clk_dclk_set_rate()
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| H A D | clk-pvtm.c | 49 static unsigned long xin32k_pvtm_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) in xin32k_pvtm_recalc_rate() argument
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| /device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/ |
| H A D | clk-dclk-divider.c | 16 unsigned long parent_rate) in clk_dclk_recalc_rate()
24 return DIV_ROUND_UP_ULL(((u64)parent_rate), val + 1); in clk_dclk_recalc_rate()
42 unsigned long parent_rate) in clk_dclk_set_rate()
49 value = divider_get_val(rate, parent_rate, divider->table, in clk_dclk_set_rate()
15 clk_dclk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) clk_dclk_recalc_rate() argument
41 clk_dclk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) clk_dclk_set_rate() argument
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| H A D | clk-pvtm.c | 51 unsigned long parent_rate) in xin32k_pvtm_recalc_rate()
50 xin32k_pvtm_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) xin32k_pvtm_recalc_rate() argument
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| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-inno-hdmi-phy.c | 215 unsigned long (*recalc_rate)(struct inno_hdmi_phy *inno, unsigned long parent_rate);
532 static int inno_hdmi_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate);
641 static unsigned long inno_hdmi_phy_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
in inno_hdmi_phy_clk_recalc_rate() argument
646 return inno->plat_data->ops->recalc_rate(inno, parent_rate);
in inno_hdmi_phy_clk_recalc_rate()
652 static long inno_hdmi_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate)
in inno_hdmi_phy_clk_round_rate() argument
693 static int inno_hdmi_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate)
in inno_hdmi_phy_clk_set_rate() argument
1137 static unsigned long inno_hdmi_rk3328_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, unsigned long parent_rate)
in inno_hdmi_rk3328_phy_pll_recalc_rate() argument
1142 u64 vco = parent_rate;
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1149 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 0x18));
in inno_hdmi_rk3328_phy_pll_recalc_rate()
1172 static unsigned long inno_hdmi_rk3228_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, unsigned long parent_rate)
in inno_hdmi_rk3228_phy_pll_recalc_rate() argument
[all...] |
| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-hdmi-phy.c | 222 unsigned long parent_rate);
441 unsigned long parent_rate);
544 unsigned long parent_rate) in inno_hdmi_phy_clk_recalc_rate()
549 return inno->plat_data->ops->recalc_rate(inno, parent_rate); in inno_hdmi_phy_clk_recalc_rate()
555 unsigned long *parent_rate) in inno_hdmi_phy_clk_round_rate()
591 unsigned long parent_rate) in inno_hdmi_phy_clk_set_rate()
1045 unsigned long parent_rate) in inno_hdmi_rk3328_phy_pll_recalc_rate()
1050 u64 vco = parent_rate; in inno_hdmi_rk3328_phy_pll_recalc_rate()
1059 vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24)); in inno_hdmi_rk3328_phy_pll_recalc_rate()
1083 unsigned long parent_rate) in inno_hdmi_rk3228_phy_pll_recalc_rate()
543 inno_hdmi_phy_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) inno_hdmi_phy_clk_recalc_rate() argument
554 inno_hdmi_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) inno_hdmi_phy_clk_round_rate() argument
590 inno_hdmi_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) inno_hdmi_phy_clk_set_rate() argument
1044 inno_hdmi_rk3328_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, unsigned long parent_rate) inno_hdmi_rk3328_phy_pll_recalc_rate() argument
1082 inno_hdmi_rk3228_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, unsigned long parent_rate) inno_hdmi_rk3228_phy_pll_recalc_rate() argument
[all...] |
| H A D | phy-rockchip-samsung-hdptx-hdmi.c | 1920 unsigned long parent_rate) in hdptx_phy_clk_recalc_rate()
1928 unsigned long *parent_rate) in hdptx_phy_clk_round_rate()
1944 unsigned long parent_rate) in hdptx_phy_clk_set_rate()
1919 hdptx_phy_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) hdptx_phy_clk_recalc_rate() argument
1927 hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) hdptx_phy_clk_round_rate() argument
1943 hdptx_phy_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) hdptx_phy_clk_set_rate() argument
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| /device/soc/rockchip/common/sdk_linux/include/linux/ |
| H A D | clk-provider.h | 231 unsigned long (*recalc_rate)(struct clk_hw *hw, unsigned long parent_rate);
232 long (*round_rate)(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate);
236 int (*set_rate)(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate);
237 int (*set_rate_and_parent)(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate, u8 index);
588 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate, unsigned int val,
594 int divider_get_val(unsigned long rate, unsigned long parent_rate, const struct clk_div_table *table, u8 width,
873 void (*approximation)(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate, unsigned long *m,
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| /device/soc/rockchip/common/sdk_linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-usb.c | 256 static unsigned long rockchip_usb_phy480m_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
in rockchip_usb_phy480m_recalc_rate() argument
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| H A D | phy-rockchip-inno-usb2.c | 408 static unsigned long rockchip_usb2phy_clk480m_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
in rockchip_usb2phy_clk480m_recalc_rate() argument
|