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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/mmu/
H A Dmali_kbase_mmu_hw_direct.c32 * @pfn: Starting page frame number of the region to lock
60 * larger than the given number of pages, because the lock region cannot start
186 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_LO), in kbase_mmu_hw_configure()
188 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_HI), in kbase_mmu_hw_configure()
191 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_LO), in kbase_mmu_hw_configure()
193 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_HI), in kbase_mmu_hw_configure()
196 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_LO), in kbase_mmu_hw_configure()
198 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_HI), in kbase_mmu_hw_configure()
206 write_cmd(kbdev, as->number, AS_COMMAND_UPDATE); in kbase_mmu_hw_configure()
224 ret = write_cmd(kbdev, as->number, AS_COMMAND_UNLOC in kbase_mmu_hw_do_operation()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/mmu/
H A Dmali_kbase_mmu_hw_direct.c33 * @pfn: Starting page frame number of the region to lock
59 /* Round up if the number of pages is not a power of 2. */ in lock_region()
154 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_LO), transcfg); in kbase_mmu_hw_configure()
155 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_HI), (transcfg >> 0x20) & 0xFFFFFFFFUL); in kbase_mmu_hw_configure()
162 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_LO), current_setup->transtab & 0xFFFFFFFFUL); in kbase_mmu_hw_configure()
163 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_HI), (current_setup->transtab >> 0x20) & 0xFFFFFFFFUL); in kbase_mmu_hw_configure()
165 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_LO), current_setup->memattr & 0xFFFFFFFFUL); in kbase_mmu_hw_configure()
166 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_HI), (current_setup->memattr >> 0x20) & 0xFFFFFFFFUL); in kbase_mmu_hw_configure()
170 write_cmd(kbdev, as->number, AS_COMMAND_UPDATE); in kbase_mmu_hw_configure()
182 ret = write_cmd(kbdev, as->number, AS_COMMAND_UNLOC in kbase_mmu_hw_do_operation()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_mmu_hw_direct.c251 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_LO), transcfg, kctx); in kbase_mmu_hw_configure()
252 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_HI), (current_setup->transcfg >> 0x20) & 0xFFFFFFFFUL, in kbase_mmu_hw_configure()
260 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_LO), current_setup->transtab & 0xFFFFFFFFUL, kctx); in kbase_mmu_hw_configure()
261 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_HI), (current_setup->transtab >> 0x20) & 0xFFFFFFFFUL, in kbase_mmu_hw_configure()
264 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_LO), current_setup->memattr & 0xFFFFFFFFUL, kctx); in kbase_mmu_hw_configure()
265 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_HI), (current_setup->memattr >> 0x20) & \ in kbase_mmu_hw_configure()
270 write_cmd(kbdev, as->number, AS_COMMAND_UPDATE, kctx); in kbase_mmu_hw_configure()
282 ret = write_cmd(kbdev, as->number, AS_COMMAND_UNLOCK, kctx); in kbase_mmu_hw_do_operation()
287 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_LO), lock_addr & 0xFFFFFFFFUL, kctx); in kbase_mmu_hw_do_operation()
288 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_H in kbase_mmu_hw_do_operation()
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_mmu_hw_direct.c274 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_LO), in kbase_mmu_hw_configure()
276 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSCFG_HI), in kbase_mmu_hw_configure()
284 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_LO), in kbase_mmu_hw_configure()
286 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_TRANSTAB_HI), in kbase_mmu_hw_configure()
289 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_LO), in kbase_mmu_hw_configure()
291 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_MEMATTR_HI), in kbase_mmu_hw_configure()
299 write_cmd(kbdev, as->number, AS_COMMAND_UPDATE, kctx); in kbase_mmu_hw_configure()
312 ret = write_cmd(kbdev, as->number, AS_COMMAND_UNLOCK, kctx); in kbase_mmu_hw_do_operation()
317 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_LO), in kbase_mmu_hw_do_operation()
319 kbase_reg_write(kbdev, MMU_AS_REG(as->number, AS_LOCKADDR_H in kbase_mmu_hw_do_operation()
[all...]
/device/soc/rockchip/common/sdk_linux/include/linux/
H A Dandroid_kabi.h77 * number: the "number" of the padding variable in the structure. Start with
80 #define ANDROID_KABI_RESERVE(number) _ANDROID_KABI_RESERVE(number)
87 * ANDROID_KABI_USE(number, _new)
89 * number: the previous "number" of the padding variable
92 #define ANDROID_KABI_USE(number, _new) _ANDROID_KABI_REPLACE(_ANDROID_KABI_RESERVE(number), _new)
95 * ANDROID_KABI_USE2(number, _new
[all...]
/device/soc/rockchip/rk3588/kernel/include/linux/
H A Dandroid_kabi.h83 * number: the "number" of the padding variable in the structure. Start with
86 #define ANDROID_KABI_RESERVE(number) _ANDROID_KABI_RESERVE(number)
94 * ANDROID_KABI_USE(number, _new)
96 * number: the previous "number" of the padding variable
99 #define ANDROID_KABI_USE(number, _new) \
100 _ANDROID_KABI_REPLACE(_ANDROID_KABI_RESERVE(number), _new)
103 * ANDROID_KABI_USE2(number, _new
[all...]
/device/soc/hisilicon/common/platform/timer/
H A Dtimer_hi35xx.c218 __func__, __TIME__, info->number, irqId); in TimerHi35xxIrqHandle()
224 info->cb(info->number); in TimerHi35xxIrqHandle()
225 HDF_LOGD("------------->%s: timer[%u], irqId [%u] process success", __func__, info->number, irqId); in TimerHi35xxIrqHandle()
243 __func__, info->number, cntrl->info.useconds, cntrl->info.isPeriod); in TimerHi35xxSet()
246 HDF_LOGE("%s: TimerHi35xxSetMode[%u] fail!", __func__, info->number); in TimerHi35xxSet()
266 HDF_LOGE("%s: TimerHi35xxSetMode[%u] fail!", __func__, info->number); in TimerHi35xxSetOnce()
289 HDF_LOGD("%s: timer[%u] [%u][%u][%u] ", __func__, info->number, maxSeconds, value, cntrl->info.useconds); in TimerHi35xxSetTimeout()
299 HDF_LOGE("%s: OsalRegisterIrq[%u][%u] fail!", __func__, info->irq, info->number); in TimerHi35xxIrqRegister()
446 ret = iface->GetUint32(node, "number", &info->number, in TimerHi35xxReadHcs()
[all...]
H A Dtimer_hi35xx.h36 uint32_t number; member
/device/soc/hisilicon/hi3861v100/sdk_liteos/tools/efuse_tool/
H A Defuse_cfg_gen.py38 number = 0 variable
68 number = number + 1 variable
69 header = struct.pack('BBHIII', 0, 48, number, len(buf) + 48, 0, 0)
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_gator.h41 #define GATOR_MAKE_EVENT(type, number) (((type) << 24) | ((number) << 16))
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_kbase_gator.h27 #define GATOR_MAKE_EVENT(type, number) (((type) << 24) | ((number) << 16))
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_gator.h41 #define GATOR_MAKE_EVENT(type, number) (((type) << 24) | ((number) << 16))
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_kbase_gator.h29 #define GATOR_MAKE_EVENT(type, number) (((type) << 24) | ((number) << 16))
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/mmu/backend/
H A Dmali_kbase_mmu_jm.c63 int const as_no = as->number; in kbase_gpu_report_bus_fault_and_kill()
108 as_no = as->number; in kbase_mmu_report_fault_and_kill()
192 kbase_as_has_bus_fault(as, fault) ? "Bus error" : "Page fault", as->number, fault->addr); in kbase_mmu_interrupt_process()
227 dev_warn(kbdev->dev, "Bus error in AS%d at VA=0x%016llx, IPA=0x%016llx\n", as->number, fault->addr, in kbase_mmu_interrupt_process()
230 dev_warn(kbdev->dev, "Bus error in AS%d at 0x%016llx\n", as->number, fault->addr); in kbase_mmu_interrupt_process()
387 kbdev->as[i].number = i; in kbase_mmu_as_init()
/device/soc/hisilicon/common/platform/pin/
H A Dpin_hi35xx.c42 uint16_t number; member
62 PIN_DUMPER_NAME_PREFIX, hi35xx->number) < 0) { in PinDumperCreate()
295 ret = drsOps->GetUint16(device->property, "number", &hi35xx->number, 0); in Hi35xxPinCntlrInit()
297 HDF_LOGE("%s: read number failed", __func__); in Hi35xxPinCntlrInit()
316 hi35xx->cntlr.number = hi35xx->number; in Hi35xxPinCntlrInit()
389 uint16_t number; in Hi35xxPinRelease() local
405 ret = drsOps->GetUint16(device->property, "number", &number, in Hi35xxPinRelease()
[all...]
/device/soc/hisilicon/common/platform/pwm/
H A Dpwm_hi35xx.h70 static inline void HiPwmOutputNumberSquareWaves(struct HiPwmRegs *reg, uint32_t number) in HiPwmOutputNumberSquareWaves() argument
74 /* pwm output number square waves */ in HiPwmOutputNumberSquareWaves()
75 reg->cfg2 = number; in HiPwmOutputNumberSquareWaves()
H A Dpwm_hi35xx.c125 if (config->number == 0) { in HiPwmSetConfig()
129 HiPwmOutputNumberSquareWaves(hp->reg, config->number); in HiPwmSetConfig()
133 HDF_LOGI("%s: set PwmConfig done: number %u, period %u, duty %u, polarity %hhu, enable %hhu.", in HiPwmSetConfig()
134 __func__, config->number, config->period, config->duty, config->polarity, config->status); in HiPwmSetConfig()
185 hp->dev.cfg.number = 0; in HiPwmProbe()
198 HDF_LOGI("%s: set PwmConfig: number %u, period %u, duty %u, polarity %hhu, enable %hhu.", __func__, in HiPwmProbe()
199 hp->dev.cfg.number, hp->dev.cfg.period, hp->dev.cfg.duty, hp->dev.cfg.polarity, hp->dev.cfg.status); in HiPwmProbe()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/mmu/backend/
H A Dmali_kbase_mmu_jm.c64 int const as_no = as->number; in kbase_gpu_report_bus_fault_and_kill()
115 as_no = as->number; in kbase_mmu_report_fault_and_kill()
217 as->number, fault->addr); in kbase_mmu_interrupt_process()
261 as->number, fault->addr, in kbase_mmu_interrupt_process()
427 kbdev->as[i].number = i; in kbase_mmu_as_init()
H A Dmali_kbase_mmu_csf.c150 int as_no = as->number; in kbase_gpu_report_bus_fault_and_kill()
209 as_no = as->number; in kbase_mmu_report_fault_and_kill()
287 as->number, fault->addr); in kbase_mmu_interrupt_process()
455 const u32 as_nr = faulting_as->number; in kbase_mmu_gpu_fault_worker()
552 kbdev->as[i].number = i; in kbase_mmu_as_init()
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/common/
H A Defuse_opt.c97 if (header->number > (HI_EFUSE_IDX_MAX + HI_EFUSE_LOCK_MAX)) { in efuse_cfg_verify()
114 for (hi_u8 i = 0; i < header->number; i++) { in efuse_burn()
/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/libcoap/include/coap2/
H A Doption.h39 * the number of bytes that have been parsed, or @c 0 on error. An error is
47 * @return The number of bytes parsed or @c 0 on error.
58 * @return The number of bytes between @p opt and the end of the option
71 * The number of option types below 256 that can be stored in an
79 * The number of option types above 255 that can be stored in an
92 /** The number of elements in coap_opt_filter_t. */
98 * to hold COAP_OPT_FILTER_SHORT entries with an option number between
99 * 0 and 255, and COAP_OPT_FILTER_LONG entries with an option number
270 * ordinal number (counted from @c 1), @c oi->type is the option's type code,
303 * the number o
410 uint16_t number; /**< the option number (no delta coding) */ global() member
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/include/
H A Defuse_opt.h35 hi_u16 number; /* Item number to be burn. */ member
/device/soc/hisilicon/hi3516dv300/sdk_linux/sample/platform/higv/include/
H A Dhi_gv_parser.h96 \brief Get view number.
99 \param[out] viewNum View number.
168 \param[in] excludeViewNum The number of view that not need deleted.
184 \param[out] winsNum The number of view that not need deleted.
193 \brief Get the version number.
210 \param[in] number The number of event function.
217 HI_S32 HI_GV_PARSER_SetWidgetEventFunc(const HIGV_MSG_PROC *eventProc, HI_U32 number);
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/mac/hmac/
H A Dhmac_chan_mgmt.h56 hi_u8 number; /* 信道号 */ member
/device/qemu/riscv32_virt/liteos_m/board/
H A Dmain.c175 int32_t I2cOpen(int16_t number) in I2cOpen() argument

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