| /device/soc/hisilicon/hi3751v350/sdk_linux/source/common/drv/mmz/ |
| H A D | drv_mmz_userdev.c | 61 int mmz_flush_dcache_mmb(const struct mmb_info *mi) in mmz_flush_dcache_mmb() argument
69 if (mi == NULL) { in mmz_flush_dcache_mmb()
79 if (mi->phys_addr != MMB_ADDR_INVALID) { in mmz_flush_dcache_mmb()
80 phyaddr = mi->phys_addr; in mmz_flush_dcache_mmb()
83 phyaddr = mi->smmu_addr; in mmz_flush_dcache_mmb()
172 static int ioctl_mmb_alloc(const struct file *file, unsigned int iocmd, struct mmb_info *mi) in ioctl_mmb_alloc() argument
176 mmb = hil_mmb_alloc(mi->mmb_name, mi->size, mi->align, mi in ioctl_mmb_alloc()
205 ioctl_mmb_free(const struct file *file, unsigned int iocmd, const struct mmb_info *mi) ioctl_mmb_free() argument
234 ioctl_mmb_get(const struct file *file, unsigned int iocmd, const struct mmb_info *mi) ioctl_mmb_get() argument
253 ioctl_mmb_put(const struct file *file, unsigned int iocmd, const struct mmb_info *mi) ioctl_mmb_put() argument
272 ioctl_mmb_query_ref(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_query_ref() argument
295 ioctl_mmb_query_source(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_query_source() argument
324 ioctl_dma_buf_export_fd(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_dma_buf_export_fd() argument
348 ioctl_mmb_get_pgtable_addr(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_get_pgtable_addr() argument
369 ioctl_mmb_user_map_cace_attr(hil_mmb_t *mmb, struct mmb_info *mi, int cached, unsigned long *offset) ioctl_mmb_user_map_cace_attr() argument
416 ioctl_mmb_user_remap_get_virt_addr(struct file *file, struct mmb_udata *udata, hil_mmb_t *mmb, int cached, const struct mmb_info *mi) ioctl_mmb_user_remap_get_virt_addr() argument
485 ioctl_mmb_user_remap(struct file *file, unsigned int iocmd, struct mmb_info *mi, int cached) ioctl_mmb_user_remap() argument
626 ioctl_mmb_user_unmap(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_user_unmap() argument
742 ioctl_mmb_user_getphyaddr(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_user_getphyaddr() argument
770 ioctl_mmb_user_cma_mapto_iommu(const struct file *file, unsigned int iocmd, struct mmb_info *mi) ioctl_mmb_user_cma_mapto_iommu() argument
783 ioctl_mmb_user_cma_unmapfrom_iommu(const struct file *file, unsigned int iocmd, const struct mmb_info *mi) ioctl_mmb_user_cma_unmapfrom_iommu() argument
795 mmz_userdev_ioctl_m(struct inode *inode, struct file *file, unsigned int cmd, struct mmb_info *mi) mmz_userdev_ioctl_m() argument
923 struct mmb_info mi = {0}; mmz_userdev_ioctl() local
[all...] |
| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/osal/linux/mmz/ |
| H A D | mmz_userdev.c | 712 struct mmb_info mi = { 0 }; local
714 if ((_IOC_SIZE(cmd) > sizeof(mi)) || (arg == 0)) {
719 (void)memset_s(&mi, sizeof(mi), 0, sizeof(mi));
720 if (copy_from_user(&mi, (void *)(uintptr_t)arg, _IOC_SIZE(cmd))) {
725 mi.mmz_name[HIL_MMZ_NAME_LEN - 1] = '\0';
726 mi.mmb_name[HIL_MMB_NAME_LEN - 1] = '\0';
727 ret = mmz_userdev_ioctl_m(file, cmd, &mi);
729 if (copy_to_user((void *)(uintptr_t)arg, &mi, _IOC_SIZ
848 struct mmb_info mi; global() local
[all...] |
| /device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/ |
| H A D | capture_v30.c | 79 .mi =
100 .mi =
285 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
in mp_config_mi()
288 rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
in mp_config_mi()
291 rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
in mp_config_mi()
374 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
in sp_config_mi()
377 rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite);
in sp_config_mi()
380 rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite);
in sp_config_mi()
457 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite);
in bp_config_mi()
460 rkisp_unite_write(dev, stream->config->mi in bp_config_mi()
[all...] |
| H A D | capture_v21.c | 154 .mi =
173 .mi =
192 .mi =
396 rkisp_write(dev, stream->config->mi.y_size_init, stream->out_fmt.plane_fmt[0].bytesperline * stream->out_fmt.height,
in mp_config_mi()
398 rkisp_write(dev, stream->config->mi.cb_size_init, stream->out_fmt.plane_fmt[1].sizeimage, false);
in mp_config_mi()
399 rkisp_write(dev, stream->config->mi.cr_size_init, stream->out_fmt.plane_fmt[RKISP_MAX_SENSOR].sizeimage, false);
in mp_config_mi()
458 rkisp_write(dev, stream->config->mi.y_size_init, stream->out_fmt.plane_fmt[0].bytesperline * stream->out_fmt.height,
in sp_config_mi()
460 rkisp_write(dev, stream->config->mi.cb_size_init, stream->out_fmt.plane_fmt[1].sizeimage, false);
in sp_config_mi()
461 rkisp_write(dev, stream->config->mi.cr_size_init, stream->out_fmt.plane_fmt[RKISP_MAX_SENSOR].sizeimage, false);
in sp_config_mi()
661 rkisp_read(dev, stream->config->mi in update_dmatx_v2()
[all...] |
| H A D | dmarx.c | 234 .mi =
247 .mi =
259 .mi =
271 .mi =
390 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
393 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
|
| H A D | capture.h | 186 } mi; member
|
| H A D | regs.h | 1654 writel(val, base + stream->config->mi.y_size_init);
in mi_set_y_size()
1661 writel(val, base + stream->config->mi.cb_size_init);
in mi_set_cb_size()
1668 writel(val, base + stream->config->mi.cr_size_init);
in mi_set_cr_size()
1675 writel(val, base + stream->config->mi.y_base_ad_init);
in mi_set_y_addr()
1682 writel(val, base + stream->config->mi.cb_base_ad_init);
in mi_set_cb_addr()
1689 writel(val, base + stream->config->mi.cr_base_ad_init);
in mi_set_cr_addr()
1696 writel(val, base + stream->config->mi.y_offs_cnt_init);
in mi_set_y_offset()
1703 writel(val, base + stream->config->mi.cb_offs_cnt_init);
in mi_set_cb_offset()
1710 writel(val, base + stream->config->mi.cr_offs_cnt_init);
in mi_set_cr_offset()
|
| H A D | capture_v1x.c | 342 readl(base + stream->config->mi.y_base_ad_init), readl(base + stream->config->mi.cb_base_ad_init),
in update_mi()
343 readl(base + stream->config->mi.cr_base_ad_init));
in update_mi()
670 * produce mi interrupt.
in rkisp_stream_start()
877 v4l2_dbg(0x03, rkisp_debug, &dev->v4l2_dev, "mi isr:0x%x\n", mis_val);
in rkisp_mi_v1x_isr()
|
| H A D | regs_v2x.h | 2289 /* mi interrupt */
2691 if (stream->config->mi.length == MI_RAW0_RD_LENGTH || stream->config->mi.length == MI_RAW1_RD_LENGTH || in mi_raw_length()
2692 stream->config->mi.length == MI_RAW2_RD_LENGTH) { in mi_raw_length()
2695 rkisp_write(stream->ispdev, stream->config->mi.length, stream->out_fmt.plane_fmt[0].bytesperline, is_direct); in mi_raw_length()
2700 rkisp_next_write(stream->ispdev, stream->config->mi.length, stream->out_fmt.plane_fmt[0].bytesperline, in mi_raw_length()
|
| H A D | capture.c | 338 /* dmatx buf update by mi force or oneself frame end,
in rkisp_config_dmatx_valid_buf()
806 .mi =
866 .mi =
|
| H A D | rkisp.c | 938 /* update mi and isp, base_reg will update to shd_reg */
in rkisp_reset_handle_v2x()
1691 * ISP(mi) stop in mi frame end -> Stop ISP(mipi) ->
in rkisp_isp_stop()
2613 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false);
in rkisp_rx_buf_pool_init()
2616 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false);
in rkisp_rx_buf_pool_init()
|
| /device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/ |
| H A D | capture_v30.c | 82 .mi = {
101 .mi = {
302 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite); in mp_config_mi()
305 rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite); in mp_config_mi()
308 rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite); in mp_config_mi()
394 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite); in sp_config_mi()
397 rkisp_unite_write(dev, stream->config->mi.cb_size_init, val, false, is_unite); in sp_config_mi()
400 rkisp_unite_write(dev, stream->config->mi.cr_size_init, val, false, is_unite); in sp_config_mi()
480 rkisp_unite_write(dev, stream->config->mi.y_size_init, val, false, is_unite); in bp_config_mi()
483 rkisp_unite_write(dev, stream->config->mi in bp_config_mi()
[all...] |
| H A D | capture_v21.c | 135 .mi = {
152 .mi = {
169 .mi = {
378 rkisp_write(dev, stream->config->mi.y_size_init, in mp_config_mi()
381 rkisp_write(dev, stream->config->mi.cb_size_init, in mp_config_mi()
383 rkisp_write(dev, stream->config->mi.cr_size_init, in mp_config_mi()
444 rkisp_write(dev, stream->config->mi.y_size_init, in sp_config_mi()
447 rkisp_write(dev, stream->config->mi.cb_size_init, in sp_config_mi()
449 rkisp_write(dev, stream->config->mi.cr_size_init, in sp_config_mi()
668 rkisp_read(dev, stream->config->mi in update_dmatx_v2()
[all...] |
| H A D | dmarx.c | 206 .mi = {
218 .mi = {
229 .mi = {
240 .mi = {
373 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
377 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
|
| H A D | capture.h | 190 } mi; member
|
| H A D | regs.h | 1677 writel(val, base + stream->config->mi.y_size_init); in mi_set_y_size()
1684 writel(val, base + stream->config->mi.cb_size_init); in mi_set_cb_size()
1691 writel(val, base + stream->config->mi.cr_size_init); in mi_set_cr_size()
1698 writel(val, base + stream->config->mi.y_base_ad_init); in mi_set_y_addr()
1705 writel(val, base + stream->config->mi.cb_base_ad_init); in mi_set_cb_addr()
1712 writel(val, base + stream->config->mi.cr_base_ad_init); in mi_set_cr_addr()
1719 writel(val, base + stream->config->mi.y_offs_cnt_init); in mi_set_y_offset()
1726 writel(val, base + stream->config->mi.cb_offs_cnt_init); in mi_set_cb_offset()
1733 writel(val, base + stream->config->mi.cr_offs_cnt_init); in mi_set_cr_offset()
|
| H A D | capture_v1x.c | 357 readl(base + stream->config->mi.y_base_ad_init), in update_mi()
358 readl(base + stream->config->mi.cb_base_ad_init), in update_mi()
359 readl(base + stream->config->mi.cr_base_ad_init)); in update_mi()
708 * produce mi interrupt. in rkisp_stream_start()
926 "mi isr:0x%x\n", mis_val); in rkisp_mi_v1x_isr()
|
| H A D | regs_v2x.h | 2290 /* mi interrupt */
2695 if (stream->config->mi.length == MI_RAW0_RD_LENGTH || in mi_raw_length()
2696 stream->config->mi.length == MI_RAW1_RD_LENGTH || in mi_raw_length()
2697 stream->config->mi.length == MI_RAW2_RD_LENGTH) in mi_raw_length()
2699 rkisp_write(stream->ispdev, stream->config->mi.length, in mi_raw_length()
2704 rkisp_next_write(stream->ispdev, stream->config->mi.length, in mi_raw_length()
|
| H A D | capture.c | 358 /* dmatx buf update by mi force or oneself frame end, in rkisp_config_dmatx_valid_buf()
795 .mi = {
852 .mi = {
|
| H A D | rkisp.c | 935 /* update mi and isp, base_reg will update to shd_reg */ in rkisp_reset_handle_v2x()
1739 * ISP(mi) stop in mi frame end -> Stop ISP(mipi) -> in rkisp_isp_stop()
2630 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
2634 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
|