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Help
Searched
refs:dram_type
(Results
1 - 7
of
7
) sorted by relevance
/device/soc/rockchip/common/sdk_linux/drivers/devfreq/event/
H
A
D
rockchip-dfi.c
99
u32
dram_type
;
member
332
if (info->
dram_type
== LPDDR3 || info->
dram_type
== LPDDR2) {
in rockchip_dfi_start_hardware_counter()
334
} else if (info->
dram_type
== LPDDR4 || info->
dram_type
== LPDDR4X) {
in rockchip_dfi_start_hardware_counter()
336
} else if (info->
dram_type
== DDR4) {
in rockchip_dfi_start_hardware_counter()
371
if (info->
dram_type
== LPDDR4 || info->
dram_type
== LPDDR4X) {
in rockchip_dfi_get_busier_ch()
469
data->
dram_type
= READ_DRAMTYPE_INFO_V3(val_2, val_3);
in px30_dfi_init()
471
data->
dram_type
in px30_dfi_init()
[all...]
/device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/drv/
H
A
D
ddr_training_impl.c
111
/* DDR training phy/dmc/
dram_type
config init */
116
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[0].
dram_type
) {
in ddr_training_cfg_set_dmc()
133
DDR_INFO("phy[0] total_byte_num[%x]
dram_type
[%x]", cfg->phy[0].total_byte_num, cfg->phy[0].
dram_type
);
in ddr_training_cfg_set_dmc()
136
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[1].
dram_type
) {
in ddr_training_cfg_set_dmc()
153
DDR_INFO("phy[1] total_byte_num[%x]
dram_type
[%x]", cfg->phy[1].total_byte_num, cfg->phy[1].
dram_type
);
in ddr_training_cfg_set_dmc()
202
cfg->phy[0].
dram_type
= ddr_read(DDR_REG_BASE_PHY0 + DDR_PHY_DRAMCFG)
in ddr_training_cfg_set_phy()
206
cfg->phy[1].
dram_type
= ddr_read(DDR_REG_BASE_PHY1 + DDR_PHY_DRAMCFG)
in ddr_training_cfg_set_phy()
1654
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[cfg->phy_idx].
dram_type
) {
in ddr_hw_training_ctl()
2321
unsigned int
dram_type
= cfg->phy[cfg->phy_idx].
dram_type
;
ddr_vref_training()
local
[all...]
H
A
D
ddr_ddrc_v520.h
223
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[cfg->phy_idx].
dram_type
) \
H
A
D
ddr_training_impl.h
290
unsigned int
dram_type
;
member
/device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/drv/
H
A
D
ddr_training_impl.c
110
/* DDR training phy/dmc/
dram_type
config init */
115
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[0].
dram_type
) {
in ddr_training_cfg_set_dmc()
132
DDR_INFO("phy[0] total_byte_num[%x]
dram_type
[%x]", cfg->phy[0].total_byte_num, cfg->phy[0].
dram_type
);
in ddr_training_cfg_set_dmc()
135
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[1].
dram_type
) {
in ddr_training_cfg_set_dmc()
152
DDR_INFO("phy[1] total_byte_num[%x]
dram_type
[%x]", cfg->phy[1].total_byte_num, cfg->phy[1].
dram_type
);
in ddr_training_cfg_set_dmc()
201
cfg->phy[0].
dram_type
= ddr_read(DDR_REG_BASE_PHY0 + DDR_PHY_DRAMCFG)
in ddr_training_cfg_set_phy()
205
cfg->phy[1].
dram_type
= ddr_read(DDR_REG_BASE_PHY1 + DDR_PHY_DRAMCFG)
in ddr_training_cfg_set_phy()
1653
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[cfg->phy_idx].
dram_type
) {
in ddr_hw_training_ctl()
2323
unsigned int
dram_type
= cfg->phy[cfg->phy_idx].
dram_type
;
ddr_vref_training()
local
[all...]
H
A
D
ddr_ddrc_v520.h
223
if (PHY_DRAMCFG_TYPE_LPDDR4 == cfg->phy[cfg->phy_idx].
dram_type
) \
H
A
D
ddr_training_impl.h
291
unsigned int
dram_type
;
member
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