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Searched refs:REG_SPI_CR1 (Results 1 - 5 of 5) sorted by relevance

/device/soc/hisilicon/common/platform/spi/
H A Dspi_hi35xx.h39 #define REG_SPI_CR1 0x04 macro
H A Dspi_hi35xx.c67 {"REG_SPI_CR1", PLATFORM_DUMPER_REGISTERL, (void *)(pl022->regBase + REG_SPI_CR1)}, in SpiDumperDump()
167 value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022Enable()
169 OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022Enable()
176 value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022Disable()
178 OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022Disable()
216 value = OSAL_READL((uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022ConfigCR1()
226 OSAL_WRITEL(value, (uintptr_t)(pl022->regBase) + REG_SPI_CR1); in Pl022ConfigCR1()
/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/spi/
H A Dspi.c134 hi_reg_read16(ctrl->reg_base + REG_SPI_CR1, reg_val); in spi_disable()
136 hi_reg_write16(ctrl->reg_base + REG_SPI_CR1, reg_val); in spi_disable()
143 hi_reg_read16(ctrl->reg_base + REG_SPI_CR1, reg_val); in spi_enable()
145 hi_reg_write16(ctrl->reg_base + REG_SPI_CR1, reg_val); in spi_enable()
177 hi_reg_write16(spi_hw_ctrl->reg_base + REG_SPI_CR1, inner_cfg.cr1); in spi_config()
H A Dspi.h46 #define REG_SPI_CR1 0x04 macro
H A Dhi_spi.c258 hi_reg_read16(g_spi_ctrl[id]->reg_base + REG_SPI_CR1, reg_val); in hi_spi_set_loop_back_mode()
260 hi_reg_write16(g_spi_ctrl[id]->reg_base + REG_SPI_CR1, reg_val); in hi_spi_set_loop_back_mode()

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