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/kernel/linux/linux-6.6/drivers/devfreq/
H A Dgovernor_passive.c21 get_parent_cpu_data(struct devfreq_passive_data *p_data, in get_parent_cpu_data() argument
26 if (!p_data || !policy) in get_parent_cpu_data()
29 list_for_each_entry(parent_cpu_data, &p_data->cpu_data_list, node) in get_parent_cpu_data()
36 static void delete_parent_cpu_data(struct devfreq_passive_data *p_data) in delete_parent_cpu_data() argument
40 list_for_each_entry_safe(parent_cpu_data, tmp, &p_data->cpu_data_list, node) { in delete_parent_cpu_data()
80 struct devfreq_passive_data *p_data = in get_target_freq_with_cpufreq() local
96 parent_cpu_data = get_parent_cpu_data(p_data, policy); in get_target_freq_with_cpufreq()
133 struct devfreq_passive_data *p_data in get_target_freq_with_devfreq() local
135 struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent; in get_target_freq_with_devfreq()
170 struct devfreq_passive_data *p_data in devfreq_passive_get_target_freq() local
204 struct devfreq_passive_data *p_data = cpufreq_passive_notifier_call() local
236 struct devfreq_passive_data *p_data cpufreq_passive_unregister_notifier() local
254 struct devfreq_passive_data *p_data cpufreq_passive_register_notifier() local
371 struct devfreq_passive_data *p_data devfreq_passive_unregister_notifier() local
381 struct devfreq_passive_data *p_data devfreq_passive_register_notifier() local
396 struct devfreq_passive_data *p_data devfreq_passive_event_handler() local
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/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/
H A Dqed_fcoe.c91 struct fcoe_init_func_ramrod_data *p_data; in qed_sp_fcoe_func_start() local
115 p_data = &p_ramrod->init_ramrod_data; in qed_sp_fcoe_func_start()
128 p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu); in qed_sp_fcoe_func_start()
130 p_data->sq_num_pages_in_pbl = tmp; in qed_sp_fcoe_func_start()
152 p_data->func_params.num_tasks = tmp; in qed_sp_fcoe_func_start()
153 p_data->func_params.log_page_size = fcoe_pf_params->log_page_size; in qed_sp_fcoe_func_start()
154 p_data->func_params.debug_mode = fcoe_pf_params->debug_mode; in qed_sp_fcoe_func_start()
156 DMA_REGPAIR_LE(p_data->q_params.glbl_q_params_addr, in qed_sp_fcoe_func_start()
160 p_data->q_params.cq_num_entries = tmp; in qed_sp_fcoe_func_start()
163 p_data in qed_sp_fcoe_func_start()
229 struct fcoe_conn_offload_ramrod_data *p_data; qed_sp_fcoe_conn_offload() local
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/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qed/
H A Dqed_fcoe.c92 struct fcoe_init_func_ramrod_data *p_data; in qed_sp_fcoe_func_start() local
116 p_data = &p_ramrod->init_ramrod_data; in qed_sp_fcoe_func_start()
129 p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu); in qed_sp_fcoe_func_start()
131 p_data->sq_num_pages_in_pbl = tmp; in qed_sp_fcoe_func_start()
153 p_data->func_params.num_tasks = tmp; in qed_sp_fcoe_func_start()
154 p_data->func_params.log_page_size = fcoe_pf_params->log_page_size; in qed_sp_fcoe_func_start()
155 p_data->func_params.debug_mode = fcoe_pf_params->debug_mode; in qed_sp_fcoe_func_start()
157 DMA_REGPAIR_LE(p_data->q_params.glbl_q_params_addr, in qed_sp_fcoe_func_start()
161 p_data->q_params.cq_num_entries = tmp; in qed_sp_fcoe_func_start()
164 p_data in qed_sp_fcoe_func_start()
230 struct fcoe_conn_offload_ramrod_data *p_data; qed_sp_fcoe_conn_offload() local
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/std_i2c/
H A Ddrv_i2c_intf.c129 char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], i2c_msg *p_data) in i2c_proc_wr_read_get_dev_msg()
131 if ((p_data == HI_NULL) || (argv == HI_NULL)) { in i2c_proc_wr_read_get_dev_msg()
141 p_data->i2c_no = (hi_u32)osal_strtoul(argv[1], NULL, 16); // 命令的第1个参数 字符串转成16进制的正整数 in i2c_proc_wr_read_get_dev_msg()
142 p_data->dev_addr = (hi_u32)osal_strtoul(argv[2], NULL, 16); // 命令的第2个参数 字符串转成16进制的正整数 in i2c_proc_wr_read_get_dev_msg()
143 p_data->reg_addr = (hi_u32)osal_strtoul(argv[3], NULL, 16); // 命令的第3个参数 字符串转成16进制的正整数 in i2c_proc_wr_read_get_dev_msg()
144 p_data->reg_addr_len = (hi_u32)osal_strtoul(argv[4], NULL, 16); // 命令的第4个参数 字符串转成16进制的正整数 in i2c_proc_wr_read_get_dev_msg()
145 p_data->data_len = (hi_u32)osal_strtoul(argv[5], NULL, 16); // 命令的第5个参数 字符串转成16进制的正整数 in i2c_proc_wr_read_get_dev_msg()
147 hi_dbg_print_s32(p_data->i2c_no); in i2c_proc_wr_read_get_dev_msg()
148 hi_dbg_print_h32(p_data->dev_addr); in i2c_proc_wr_read_get_dev_msg()
149 hi_dbg_print_h32(p_data in i2c_proc_wr_read_get_dev_msg()
128 i2c_proc_wr_read_get_dev_msg(hi_u8 arg_count, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], i2c_msg *p_data) i2c_proc_wr_read_get_dev_msg() argument
162 hi_u8 p_data[32] = {0}; // 数据发送缓冲区长度32 i2c_proc_wr_read() local
224 i2c_proc_wr_write_get_dev_msg(hi_u8 arg_count, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], send_msg *send, i2c_msg *p_data) i2c_proc_wr_write_get_dev_msg() argument
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H A Ddrv_i2c.c472 hi_u8 *p_data, hi_u32 data_len, in i2c_drv_write()
521 i2c_write_reg((g_i2c_kernel_addr[i2c_num] + I2C_TXR_REG), (*(p_data + i))); in i2c_drv_write()
574 hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) in i2c_drv_read()
617 *(p_data + i) = data_tmp & 0xff; in i2c_drv_read()
638 hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) in i2c_drv_read_si_labs()
677 *(p_data + i) = data_tmp & 0xff; in i2c_drv_read_si_labs()
698 hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) in i2c_drv_write_sony()
735 i2c_write_reg((g_i2c_kernel_addr[i2c_num] + I2C_TXR_REG), (*(p_data + i))); in i2c_drv_write_sony()
758 hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) in i2c_drv_read_sony()
788 *(p_data in i2c_drv_read_sony()
470 i2c_drv_write(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len, HI_BOOL b_with_stop) i2c_drv_write() argument
573 i2c_drv_read(hi_u32 i2c_num, hi_u8 i2c_dev_addr, HI_BOOL b_send_slave, hi_u32 i2c_reg_addr,\ hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) i2c_drv_read() argument
637 i2c_drv_read_si_labs(hi_u32 i2c_num, hi_u8 i2c_dev_addr, HI_BOOL b_send_slave, hi_u32 i2c_reg_addr,\ hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) i2c_drv_read_si_labs() argument
697 i2c_drv_write_sony(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) i2c_drv_write_sony() argument
756 i2c_drv_read_sony(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) i2c_drv_read_sony() argument
953 hi_u8 *p_data = NULL; hi_drv_std_i2c_write() local
1032 hi_u8 *p_data = NULL; hi_drv_std_i2c_read() local
1289 hi_drv_i2c_parm_check(hi_u32 i2c_num, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_parm_check() argument
1313 hi_drv_i2c_write(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_write() argument
1359 hi_drv_i2c_write_no_stop(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_write_no_stop() argument
1403 hi_drv_i2c_read(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_read() argument
1439 hi_drv_i2c_read_si_labs(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_read_si_labs() argument
1467 hi_drv_i2c_write_sony(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num,\ hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) hi_drv_i2c_write_sony() argument
1511 hi_drv_i2c_read_sony(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len, hi_u8 mode) hi_drv_i2c_read_sony() argument
1542 hi_drv_i2c_read_directly(hi_u32 i2c_num, hi_u8 i2c_dev_addr, hi_u32 i2c_reg_addr, \ hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len) hi_drv_i2c_read_directly() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Dcfg_space.c111 * @p_data: return data ptr
118 void *p_data, unsigned int bytes) in intel_vgpu_emulate_cfg_read()
129 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()
146 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_command_write()
149 u8 new = *(u8 *)p_data; in emulate_pci_command_write()
152 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_command_write()
168 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_rom_bar_write()
171 u32 new = *(u32 *)(p_data); in emulate_pci_rom_bar_write()
177 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_rom_bar_write()
182 void *p_data, unsigne in emulate_pci_bar_write()
117 intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_read() argument
145 emulate_pci_command_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_command_write() argument
167 emulate_pci_rom_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_rom_bar_write() argument
181 emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_bar_write() argument
256 intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_write() argument
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H A Dedid.c139 unsigned int offset, void *p_data, unsigned int bytes) in gmbus0_mmio_write()
144 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in gmbus0_mmio_write() local
179 void *p_data, unsigned int bytes) in gmbus1_mmio_write()
183 u32 wvalue = *(u32 *)p_data; in gmbus1_mmio_write()
280 void *p_data, unsigned int bytes) in gmbus3_mmio_write()
289 void *p_data, unsigned int bytes) in gmbus3_mmio_read()
302 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
314 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
335 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
342 void *p_data, unsigne in gmbus2_mmio_read()
138 gmbus0_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus0_mmio_write() argument
178 gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus1_mmio_write() argument
279 gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_write() argument
288 gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_read() argument
341 gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_read() argument
352 gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_write() argument
376 intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_read() argument
406 intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_write() argument
476 intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, int port_idx, unsigned int offset, void *p_data) intel_gvt_i2c_handle_aux_ch_write() argument
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H A Dhandlers.c88 void *p_data, unsigned int bytes) in read_vreg()
90 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in read_vreg()
94 void *p_data, unsigned int bytes) in write_vreg()
96 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in write_vreg() local
193 unsigned int fence_num, void *p_data, unsigned int bytes) in sanitize_fence_mmio_access()
209 memset(p_data, 0, bytes); in sanitize_fence_mmio_access()
216 unsigned int offset, void *p_data, unsigned int bytes) in gamw_echo_dev_rw_ia_write()
218 u32 ips = (*(u32 *)p_data) & GAMW_ECO_ENABLE_64K_IPS_FIELD; in gamw_echo_dev_rw_ia_write()
236 write_vreg(vgpu, offset, p_data, bytes); in gamw_echo_dev_rw_ia_write()
241 void *p_data, unsigne in fence_mmio_read()
87 read_vreg(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) read_vreg() argument
93 write_vreg(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) write_vreg() argument
192 sanitize_fence_mmio_access(struct intel_vgpu *vgpu, unsigned int fence_num, void *p_data, unsigned int bytes) sanitize_fence_mmio_access() argument
215 gamw_echo_dev_rw_ia_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gamw_echo_dev_rw_ia_write() argument
240 fence_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_read() argument
253 fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_write() argument
277 mul_force_wake_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mul_force_wake_write() argument
311 gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gdrst_mmio_write() argument
360 gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_read() argument
366 gmbus_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_write() argument
372 pch_pp_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_pp_control_mmio_write() argument
390 transconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) transconf_mmio_write() argument
402 lcpll_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) lcpll_ctl_mmio_write() argument
420 dpy_reg_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpy_reg_mmio_read() argument
697 pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pipeconf_mmio_write() argument
770 force_nonpriv_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) force_nonpriv_write() argument
793 ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ddi_buf_ctl_mmio_write() argument
809 fdi_rx_iir_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fdi_rx_iir_mmio_write() argument
900 update_fdi_rx_iir_status(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) update_fdi_rx_iir_status() argument
944 dp_tp_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_ctl_mmio_write() argument
962 dp_tp_status_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_status_mmio_write() argument
977 pch_adpa_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_adpa_mmio_write() argument
990 south_chicken2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) south_chicken2_mmio_write() argument
1008 pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pri_surf_mmio_write() argument
1031 spr_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) spr_surf_mmio_write() argument
1048 reg50080_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) reg50080_mmio_write() argument
1161 dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_aux_ch_ctl_mmio_write() argument
1331 mbctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mbctl_write() argument
1339 vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) vga_control_mmio_write() argument
1393 sbi_data_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_data_mmio_read() argument
1407 sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_ctl_mmio_write() argument
1437 pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_read() argument
1513 pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_write() argument
1557 pf_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pf_write() argument
1575 power_well_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) power_well_ctl_mmio_write() argument
1590 gen9_dbuf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_dbuf_ctl_mmio_write() argument
1603 fpga_dbg_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fpga_dbg_mmio_write() argument
1613 dma_ctrl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dma_ctrl_write() argument
1632 gen9_trtte_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtte_write() argument
1649 gen9_trtt_chicken_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtt_chicken_write() argument
1656 dpll_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpll_status_read() argument
1678 mailbox_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mailbox_write() argument
1736 hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) hws_pga_write() argument
1767 skl_power_well_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_power_well_ctl_write() argument
1782 skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_lcpll_write() argument
1796 bxt_de_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_de_pll_enable_write() argument
1809 bxt_port_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_pll_enable_write() argument
1822 bxt_phy_ctl_family_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_phy_ctl_family_write() argument
1843 bxt_port_tx_dw3_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_tx_dw3_read() argument
1855 bxt_pcs_dw12_grp_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_pcs_dw12_grp_write() argument
1873 bxt_gt_disp_pwron_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_gt_disp_pwron_write() argument
1898 edp_psr_imr_iir_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) edp_psr_imr_iir_write() argument
1915 bxt_ppat_low_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_ppat_low_write() argument
1933 guc_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) guc_status_read() argument
1943 mmio_read_from_hw(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mmio_read_from_hw() argument
1970 elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) elsp_mmio_write() argument
2012 ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_mode_mmio_write() argument
2071 gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gvt_reg_tlb_control_handler() argument
2103 ring_reset_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_reset_ctl_write() argument
2120 csfe_chicken1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) csfe_chicken1_mmio_write() argument
3052 intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_read() argument
3069 intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_write() argument
3086 intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_mask_mmio_write() argument
[all...]
H A Dmmio.c65 void *p_data, unsigned int bytes, bool read) in failsafe_emulate_mmio_rw()
71 if (!vgpu || !p_data) in failsafe_emulate_mmio_rw()
79 intel_vgpu_default_mmio_read(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
82 intel_vgpu_default_mmio_write(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
88 memcpy(p_data, pt, bytes); in failsafe_emulate_mmio_rw()
90 memcpy(pt, p_data, bytes); in failsafe_emulate_mmio_rw()
100 * @p_data: data return buffer
107 void *p_data, unsigned int bytes) in intel_vgpu_emulate_mmio_read()
115 failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true); in intel_vgpu_emulate_mmio_read()
136 p_data, byte in intel_vgpu_emulate_mmio_read()
64 failsafe_emulate_mmio_rw(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes, bool read) failsafe_emulate_mmio_rw() argument
106 intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_read() argument
181 intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_write() argument
[all...]
H A Dmmio.h92 void *p_data, unsigned int bytes);
94 void *p_data, unsigned int bytes);
97 void *p_data, unsigned int bytes);
99 void *p_data, unsigned int bytes);
108 void *p_data, unsigned int bytes);
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Dedid.c136 unsigned int offset, void *p_data, unsigned int bytes) in gmbus0_mmio_write()
141 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in gmbus0_mmio_write() local
176 void *p_data, unsigned int bytes) in gmbus1_mmio_write()
180 u32 wvalue = *(u32 *)p_data; in gmbus1_mmio_write()
277 void *p_data, unsigned int bytes) in gmbus3_mmio_write()
286 void *p_data, unsigned int bytes) in gmbus3_mmio_read()
299 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
311 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
332 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in gmbus3_mmio_read()
339 void *p_data, unsigne in gmbus2_mmio_read()
135 gmbus0_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus0_mmio_write() argument
175 gmbus1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus1_mmio_write() argument
276 gmbus3_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_write() argument
285 gmbus3_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus3_mmio_read() argument
338 gmbus2_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_read() argument
349 gmbus2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus2_mmio_write() argument
373 intel_gvt_i2c_handle_gmbus_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_read() argument
403 intel_gvt_i2c_handle_gmbus_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_gvt_i2c_handle_gmbus_write() argument
477 intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, int port_idx, unsigned int offset, void *p_data) intel_gvt_i2c_handle_aux_ch_write() argument
[all...]
H A Dmmio.c61 void *p_data, unsigned int bytes, bool read) in failsafe_emulate_mmio_rw()
67 if (!vgpu || !p_data) in failsafe_emulate_mmio_rw()
75 intel_vgpu_default_mmio_read(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
78 intel_vgpu_default_mmio_write(vgpu, offset, p_data, in failsafe_emulate_mmio_rw()
84 memcpy(p_data, pt, bytes); in failsafe_emulate_mmio_rw()
86 memcpy(pt, p_data, bytes); in failsafe_emulate_mmio_rw()
96 * @p_data: data return buffer
103 void *p_data, unsigned int bytes) in intel_vgpu_emulate_mmio_read()
111 failsafe_emulate_mmio_rw(vgpu, pa, p_data, bytes, true); in intel_vgpu_emulate_mmio_read()
132 p_data, byte in intel_vgpu_emulate_mmio_read()
60 failsafe_emulate_mmio_rw(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes, bool read) failsafe_emulate_mmio_rw() argument
102 intel_vgpu_emulate_mmio_read(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_read() argument
177 intel_vgpu_emulate_mmio_write(struct intel_vgpu *vgpu, u64 pa, void *p_data, unsigned int bytes) intel_vgpu_emulate_mmio_write() argument
[all...]
H A Dcfg_space.c110 * @p_data: return data ptr
117 void *p_data, unsigned int bytes) in intel_vgpu_emulate_cfg_read()
128 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()
189 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_command_write()
192 u8 new = *(u8 *)p_data; in emulate_pci_command_write()
196 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_command_write()
220 unsigned int offset, void *p_data, unsigned int bytes) in emulate_pci_rom_bar_write()
223 u32 new = *(u32 *)(p_data); in emulate_pci_rom_bar_write()
229 vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes); in emulate_pci_rom_bar_write()
234 void *p_data, unsigne in emulate_pci_bar_write()
116 intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_read() argument
188 emulate_pci_command_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_command_write() argument
219 emulate_pci_rom_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_rom_bar_write() argument
233 emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) emulate_pci_bar_write() argument
310 intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_emulate_cfg_write() argument
[all...]
H A Dhandlers.c75 void *p_data, unsigned int bytes) in read_vreg()
77 memcpy(p_data, &vgpu_vreg(vgpu, offset), bytes); in read_vreg()
81 void *p_data, unsigned int bytes) in write_vreg()
83 memcpy(&vgpu_vreg(vgpu, offset), p_data, bytes); in write_vreg() local
195 unsigned int fence_num, void *p_data, unsigned int bytes) in sanitize_fence_mmio_access()
211 memset(p_data, 0, bytes); in sanitize_fence_mmio_access()
218 unsigned int offset, void *p_data, unsigned int bytes) in gamw_echo_dev_rw_ia_write()
220 u32 ips = (*(u32 *)p_data) & GAMW_ECO_ENABLE_64K_IPS_FIELD; in gamw_echo_dev_rw_ia_write()
238 write_vreg(vgpu, offset, p_data, bytes); in gamw_echo_dev_rw_ia_write()
243 void *p_data, unsigne in fence_mmio_read()
74 read_vreg(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) read_vreg() argument
80 write_vreg(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) write_vreg() argument
194 sanitize_fence_mmio_access(struct intel_vgpu *vgpu, unsigned int fence_num, void *p_data, unsigned int bytes) sanitize_fence_mmio_access() argument
217 gamw_echo_dev_rw_ia_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gamw_echo_dev_rw_ia_write() argument
242 fence_mmio_read(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_read() argument
255 fence_mmio_write(struct intel_vgpu *vgpu, unsigned int off, void *p_data, unsigned int bytes) fence_mmio_write() argument
279 mul_force_wake_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mul_force_wake_write() argument
313 gdrst_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gdrst_mmio_write() argument
362 gmbus_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_read() argument
368 gmbus_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gmbus_mmio_write() argument
374 pch_pp_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_pp_control_mmio_write() argument
392 transconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) transconf_mmio_write() argument
404 lcpll_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) lcpll_ctl_mmio_write() argument
422 dpy_reg_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpy_reg_mmio_read() argument
446 pipeconf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pipeconf_mmio_write() argument
519 force_nonpriv_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) force_nonpriv_write() argument
542 ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ddi_buf_ctl_mmio_write() argument
558 fdi_rx_iir_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fdi_rx_iir_mmio_write() argument
649 update_fdi_rx_iir_status(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) update_fdi_rx_iir_status() argument
693 dp_tp_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_ctl_mmio_write() argument
711 dp_tp_status_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_tp_status_mmio_write() argument
726 pch_adpa_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pch_adpa_mmio_write() argument
739 south_chicken2_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) south_chicken2_mmio_write() argument
757 pri_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pri_surf_mmio_write() argument
780 spr_surf_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) spr_surf_mmio_write() argument
797 reg50080_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) reg50080_mmio_write() argument
910 dp_aux_ch_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dp_aux_ch_ctl_mmio_write() argument
1080 mbctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mbctl_write() argument
1088 vga_control_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) vga_control_mmio_write() argument
1142 sbi_data_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_data_mmio_read() argument
1156 sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) sbi_ctl_mmio_write() argument
1186 pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_read() argument
1262 pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pvinfo_mmio_write() argument
1306 pf_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) pf_write() argument
1324 power_well_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) power_well_ctl_mmio_write() argument
1339 gen9_dbuf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_dbuf_ctl_mmio_write() argument
1352 fpga_dbg_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) fpga_dbg_mmio_write() argument
1362 dma_ctrl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dma_ctrl_write() argument
1381 gen9_trtte_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtte_write() argument
1398 gen9_trtt_chicken_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gen9_trtt_chicken_write() argument
1405 dpll_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) dpll_status_read() argument
1427 mailbox_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mailbox_write() argument
1485 hws_pga_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) hws_pga_write() argument
1516 skl_power_well_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_power_well_ctl_write() argument
1531 skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) skl_lcpll_write() argument
1545 bxt_de_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_de_pll_enable_write() argument
1558 bxt_port_pll_enable_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_pll_enable_write() argument
1571 bxt_phy_ctl_family_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_phy_ctl_family_write() argument
1592 bxt_port_tx_dw3_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_port_tx_dw3_read() argument
1604 bxt_pcs_dw12_grp_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_pcs_dw12_grp_write() argument
1622 bxt_gt_disp_pwron_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_gt_disp_pwron_write() argument
1647 edp_psr_imr_iir_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) edp_psr_imr_iir_write() argument
1664 bxt_ppat_low_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) bxt_ppat_low_write() argument
1682 guc_status_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) guc_status_read() argument
1692 mmio_read_from_hw(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) mmio_read_from_hw() argument
1719 elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) elsp_mmio_write() argument
1761 ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_mode_mmio_write() argument
1820 gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) gvt_reg_tlb_control_handler() argument
1852 ring_reset_ctl_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) ring_reset_ctl_write() argument
1869 csfe_chicken1_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) csfe_chicken1_mmio_write() argument
3541 intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_read() argument
3558 intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_default_mmio_write() argument
3575 intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes) intel_vgpu_mask_mmio_write() argument
[all...]
H A Dmmio.h90 void *p_data, unsigned int bytes);
92 void *p_data, unsigned int bytes);
95 void *p_data, unsigned int bytes);
97 void *p_data, unsigned int bytes);
106 void *p_data, unsigned int bytes);
/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/gpio_i2c/
H A Ddrv_gpio_i2c.c385 hi_s32 hi_drv_gpioi2c_read(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data) in hi_drv_gpioi2c_read() argument
394 if ((i2c_num >= HI_I2C_MAX_NUM) || (p_data == HI_NULL) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) { in hi_drv_gpioi2c_read()
427 *p_data = i2c_receive_byte(i2c_num); in hi_drv_gpioi2c_read()
436 i2c_num, dev_addr, reg_address, *p_data); in hi_drv_gpioi2c_read()
442 hi_bool b_send_reg_address, hi_u8 *p_data, hi_u32 data_len) in drv_gpioi2c_read_data()
491 *(p_data + i) = reval; in drv_gpioi2c_read_data()
504 address, addresslen, data_len, *p_data); in drv_gpioi2c_read_data()
509 hi_s32 hi_drv_gpioi2c_read_ext(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data, in hi_drv_gpioi2c_read_ext() argument
522 if (p_data == NULL) { in hi_drv_gpioi2c_read_ext()
523 HI_LOG_ERR("para p_data i in hi_drv_gpioi2c_read_ext()
441 drv_gpioi2c_read_data(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_bool b_send_reg_address, hi_u8 *p_data, hi_u32 data_len) drv_gpioi2c_read_data() argument
535 hi_drv_gpioi2c_read_ext_directly(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data, hi_u32 data_len) hi_drv_gpioi2c_read_ext_directly() argument
612 drv_gpioi2c_write_data(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data, hi_u32 data_len, hi_bool b_send_stop_condtion) drv_gpioi2c_write_data() argument
667 hi_drv_gpioi2c_write_ext(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data, hi_u32 data_len) hi_drv_gpioi2c_write_ext() argument
693 hi_drv_gpioi2c_write_ext_no_stop(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data, hi_u32 data_len) hi_drv_gpioi2c_write_ext_no_stop() argument
726 hi_drv_gpioi2c_sccb_read(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data) hi_drv_gpioi2c_sccb_read() argument
938 hi_u8 *p_data = NULL; hi_drv_gpioi2c_cmd_write() local
998 hi_u8 *p_data = NULL; hi_drv_gpioi2c_cmd_read() local
[all...]
/kernel/linux/linux-5.10/drivers/devfreq/
H A Dgovernor_passive.c18 struct devfreq_passive_data *p_data in devfreq_passive_get_target_freq() local
20 struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent; in devfreq_passive_get_target_freq()
30 if (p_data->get_target_freq) { in devfreq_passive_get_target_freq()
31 ret = p_data->get_target_freq(devfreq, freq); in devfreq_passive_get_target_freq()
152 struct devfreq_passive_data *p_data in devfreq_passive_event_handler() local
154 struct devfreq *parent = (struct devfreq *)p_data->parent; in devfreq_passive_event_handler()
155 struct notifier_block *nb = &p_data->nb; in devfreq_passive_event_handler()
163 if (!p_data->this) in devfreq_passive_event_handler()
164 p_data->this = devfreq; in devfreq_passive_event_handler()
/kernel/linux/linux-5.10/drivers/firmware/
H A Dstratix10-svc.c191 * @p_data: pointer to service data structure
198 struct stratix10_svc_data *p_data, in svc_thread_cmd_data_claim()
223 p_data->chan->scl->receive_cb(p_data->chan->scl, in svc_thread_cmd_data_claim()
237 * @p_data: pointer to service data structure
244 struct stratix10_svc_data *p_data, in svc_thread_cmd_config_status()
276 p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); in svc_thread_cmd_config_status()
281 * @p_data: pointer to service data structure
287 static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, in svc_thread_recv_status_ok() argument
197 svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl, struct stratix10_svc_data *p_data, struct stratix10_svc_cb_data *cb_data) svc_thread_cmd_data_claim() argument
243 svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl, struct stratix10_svc_data *p_data, struct stratix10_svc_cb_data *cb_data) svc_thread_cmd_config_status() argument
808 struct stratix10_svc_data *p_data; stratix10_svc_send() local
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/drivers/flash/
H A Dhi_flashboot_flash.c182 hi_u8 p_data[2] = {0}; /* 2 */ in flash_protect_set_protect() local
189 ret = spi_flash_read_reg(SPI_CMD_RDSR, &p_data[0], 1); in flash_protect_set_protect()
193 ret = spi_flash_read_reg(SPI_CMD_RDSR2, &p_data[1], 1); in flash_protect_set_protect()
197 if (((p_data[0] & (0x1F<<2)) == (bp<<2)) && ((p_data[1] & (0x1<<6)) == (cmp<<6))) { /* 2 6 */ in flash_protect_set_protect()
201 if (flash_protect_check_nonprotect(p_data[0], p_data[1]) == HI_ERR_SUCCESS) { in flash_protect_set_protect()
204 p_data[0] &= ~(0x1f<<2); /* 2 */ in flash_protect_set_protect()
205 p_data[0] |= (hi_u8)(bp<<2); /* 2 */ in flash_protect_set_protect()
206 p_data[ in flash_protect_set_protect()
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/include/
H A Dhi_drv_i2c.h59 hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len);
61 hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len);
63 hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len);
65 hi_u8 *p_data, hi_u32 data_len, hi_u8 u8_mode);
67 hi_u8 *p_data, hi_u32 data_len, hi_u8 u8_mode);
69 hi_u32 i2c_reg_addr, hi_u32 i2c_reg_addr_byte_num, hi_u8 *p_data, hi_u32 data_len);
71 HI_U32 i2c_reg_addr, HI_U32 i2c_reg_addr_byte_num, HI_U8 *p_data, HI_U32 data_len);
H A Dhi_drv_gpioi2c.h37 HI_U8 *p_data, hi_u32 data_len);
39 hi_u32 addresslen, HI_U8 *p_data, hi_u32 data_len);
41 hi_u32 addresslen, HI_U8 *p_data, hi_u32 data_len);
43 hi_u32 address, hi_u32 addresslen, HI_U8 *p_data, hi_u32 data_len);
60 typedef hi_s32 (*fn_gpio_i2c_read)(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data);
63 typedef hi_s32 (*fn_gpio_i2c_sccb_read)(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data);
/third_party/mesa3d/src/gallium/frontends/wgl/
H A Dstw_tls.c241 struct stw_tls_data ** p_data; in stw_tls_lookup_pending_data() local
245 for (p_data = &g_pendingTlsData; *p_data; p_data = &(*p_data)->next) { in stw_tls_lookup_pending_data()
246 if ((*p_data)->dwThreadId == dwThreadId) { in stw_tls_lookup_pending_data()
247 data = *p_data; in stw_tls_lookup_pending_data()
252 *p_data = data->next; in stw_tls_lookup_pending_data()
/kernel/linux/linux-6.6/drivers/firmware/
H A Dstratix10-svc.c198 * @p_data: pointer to service data structure
205 struct stratix10_svc_data *p_data, in svc_thread_cmd_data_claim()
230 p_data->chan->scl->receive_cb(p_data->chan->scl, in svc_thread_cmd_data_claim()
244 * @p_data: pointer to service data structure
251 struct stratix10_svc_data *p_data, in svc_thread_cmd_config_status()
266 a1 = (unsigned long)p_data->paddr; in svc_thread_cmd_config_status()
267 a2 = (unsigned long)p_data->size; in svc_thread_cmd_config_status()
269 if (p_data->command == COMMAND_POLL_SERVICE_STATUS) in svc_thread_cmd_config_status()
305 p_data in svc_thread_cmd_config_status()
204 svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl, struct stratix10_svc_data *p_data, struct stratix10_svc_cb_data *cb_data) svc_thread_cmd_data_claim() argument
250 svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl, struct stratix10_svc_data *p_data, struct stratix10_svc_cb_data *cb_data) svc_thread_cmd_config_status() argument
316 svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, struct stratix10_svc_cb_data *cb_data, struct arm_smccc_res res) svc_thread_recv_status_ok() argument
959 struct stratix10_svc_data *p_data; stratix10_svc_send() local
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/kernel/linux/linux-6.6/drivers/edac/
H A Dsynopsys_edac.c304 * @p_data: Platform data.
318 const struct synps_platform_data *p_data; member
477 if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { in handle_error()
497 if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { in handle_error()
519 if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) in enable_intr()
531 if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) in disable_intr()
547 const struct synps_platform_data *p_data; in intr_handler() local
553 p_data = priv->p_data; in intr_handler()
559 if (!(priv->p_data in intr_handler()
593 const struct synps_platform_data *p_data; check_errors() local
801 const struct synps_platform_data *p_data; init_csrows() local
1322 const struct synps_platform_data *p_data; mc_probe() local
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/drivers/flash/
H A Dhi_loaderboot_flash.c167 hi_u8 p_data[2] = {0}; /* 2 */ in flash_protect_set_protect() local
175 ret = spi_flash_read_reg(SPI_CMD_RDSR, &p_data[0], 1); in flash_protect_set_protect()
179 ret = spi_flash_read_reg(SPI_CMD_RDSR2, &p_data[1], 1); in flash_protect_set_protect()
183 if (((p_data[0] & (0x1F<<2)) == (bp<<2)) && ((p_data[1] & (0x1<<6)) == (cmp<<6))) { /* 2 6 */ in flash_protect_set_protect()
186 p_data[0] &= ~(0x1f<<2); /* 2 */ in flash_protect_set_protect()
187 p_data[0] |= (hi_u8)(bp<<2); /* 2 */ in flash_protect_set_protect()
188 p_data[1] &= ~(0x1<<6); /* 6 */ in flash_protect_set_protect()
189 p_data[1] |= (hi_u8)(cmp<<6); /* 6 */ in flash_protect_set_protect()
190 ret = spi_flash_write_sr_reg(SPI_CMD_WRSR1, p_data, in flash_protect_set_protect()
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