/third_party/vixl/test/aarch64/traces/ |
H A D | sim-uqrshl-8h-trace-aarch64.h | 38 0xffff, 0xffff, 0xffff, 0xffff, 0x1000, 0x2000, 0x4000, 0x0000, 49 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x1000, 0x2000, 0x0000, 50 0xffff, 0xffff, 0xffff, 0xffff, 0x1000, 0x2000, 0x4000, 0x0000, 61 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 62 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 63 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 74 0xffff, 0xffff, 0xffff, 0xffff, 0x1000, 0x2000, 0x0000, 0x0001, 75 0xffff, 0xffff, 0xffff, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 87 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 0x0004, 88 0x0000, 0x0000, 0x1000, 0x2000, [all...] |
H A D | sim-urshl-8h-trace-aarch64.h | 38 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 49 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 50 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 61 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 62 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 63 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 74 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 75 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 87 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 0x0004, 88 0x0000, 0x0000, 0x1000, 0x2000, [all...] |
H A D | sim-fsqrt-8h-trace-aarch64.h | 39 0xfe00, 0xff23, 0xfe01, 0x7e00, 0x7e00, 0x7e00, 0x0000, 0x2000, 40 0xff23, 0xfe01, 0x7e00, 0x7e00, 0x7e00, 0x0000, 0x2000, 0x39a8, 41 0xfe01, 0x7e00, 0x7e00, 0x7e00, 0x0000, 0x2000, 0x39a8, 0x39a8, 42 0x7e00, 0x7e00, 0x7e00, 0x0000, 0x2000, 0x39a8, 0x39a8, 0x39a9, 43 0x7e00, 0x7e00, 0x0000, 0x2000, 0x39a8, 0x39a8, 0x39a9, 0x3bff, 44 0x7e00, 0x0000, 0x2000, 0x39a8, 0x39a8, 0x39a9, 0x3bff, 0x3c00, 45 0x0000, 0x2000, 0x39a8, 0x39a8, 0x39a9, 0x3bff, 0x3c00, 0x3c00, 46 0x2000, 0x39a8, 0x39a8, 0x39a9, 0x3bff, 0x3c00, 0x3c00, 0x3ce6,
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H A D | sim-urshr-4h-2opimm-trace-aarch64.h | 56 0x1ff0, 0x1ff0, 0x1ffe, 0x2000, 72 0x1ff0, 0x1ffe, 0x2000, 0x2000, 88 0x1ffe, 0x2000, 0x2000, 0x2000, 104 0x2000, 0x2000, 0x2000, 0x0000, 120 0x2000, [all...] |
H A D | sim-urshr-8h-2opimm-trace-aarch64.h | 40 0x1ff0, 0x1ff0, 0x1ff0, 0x1ffe, 0x2000, 0x2000, 0x2000, 0x0000, 56 0x1ff0, 0x1ff0, 0x1ffe, 0x2000, 0x2000, 0x2000, 0x0000, 0x0000, 72 0x1ff0, 0x1ffe, 0x2000, 0x2000, 0x2000, 0x0000, 0x0000, 0x0000, 88 0x1ffe, 0x2000, [all...] |
H A D | sim-shl-4h-2opimm-trace-aarch64.h | 50 0x1000, 0x2000, 0x3000, 0x0000, 51 0x2000, 0x4000, 0x6000, 0x0000, 66 0x2000, 0x3000, 0x0000, 0xd000, 131 0xc000, 0xe000, 0x0000, 0x2000, 146 0xf000, 0x0000, 0x1000, 0x2000, 147 0xe000, 0x0000, 0x2000, 0x4000, 159 0x0000, 0x0200, 0x0400, 0x2000, 162 0x0000, 0x1000, 0x2000, 0x0000, 163 0x0000, 0x2000, 0x4000, 0x0000, 175 0x0200, 0x0400, 0x2000, [all...] |
H A D | sim-shl-8h-2opimm-trace-aarch64.h | 50 0x1000, 0x2000, 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 51 0x2000, 0x4000, 0x6000, 0x0000, 0xa000, 0xc000, 0xe000, 0x0000, 66 0x2000, 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000, 67 0x4000, 0x6000, 0x0000, 0xa000, 0xc000, 0xe000, 0x0000, 0x2000, 82 0x3000, 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000, 0x2000, 83 0x6000, 0x0000, 0xa000, 0xc000, 0xe000, 0x0000, 0x2000, 0x4000, 95 0xe000, 0xfa00, 0xfc00, 0xfe00, 0x0000, 0x0200, 0x0400, 0x2000, 98 0x0000, 0xd000, 0xe000, 0xf000, 0x0000, 0x1000, 0x2000, 0x0000, 99 0x0000, 0xa000, 0xc000, 0xe000, 0x0000, 0x2000, 0x4000, 0x0000, 111 0xfa00, 0xfc00, 0xfe00, 0x0000, 0x0200, 0x0400, 0x2000, [all...] |
H A D | sim-sqrshl-8h-trace-aarch64.h | 38 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x1000, 0x2000, 0x4000, 0x0000, 49 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x1000, 0x2000, 0x0000, 50 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x1000, 0x2000, 0x4000, 0x0000, 61 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 62 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 63 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 74 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x1000, 0x2000, 0x0000, 0x0001, 75 0x7fff, 0x7fff, 0x7fff, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 87 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 0x0004, 88 0x0000, 0x0000, 0x1000, 0x2000, [all...] |
H A D | sim-srshl-8h-trace-aarch64.h | 38 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 49 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 50 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 61 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 62 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 63 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 74 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 75 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0002, 87 0x0000, 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0001, 0x0004, 88 0x0000, 0x0000, 0x1000, 0x2000, [all...] |
H A D | sim-fsqrt-4h-trace-aarch64.h | 43 0x7e00, 0x7e00, 0x0000, 0x2000, 44 0x7e00, 0x0000, 0x2000, 0x39a8, 45 0x0000, 0x2000, 0x39a8, 0x39a8, 46 0x2000, 0x39a8, 0x39a8, 0x39a9,
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H A D | sim-uqrshl-4h-trace-aarch64.h | 88 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 100 0xffff, 0xffff, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 112 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 113 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 124 0xffff, 0xffff, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 125 0xffff, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 137 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 138 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 149 0xffff, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 150 0x1000, 0x2000, [all...] |
H A D | sim-urshl-4h-trace-aarch64.h | 88 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 100 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 112 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 113 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 124 0x0000, 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 125 0x0000, 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 137 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 138 0x1000, 0x2000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 149 0x0000, 0x1000, 0x2000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 150 0x1000, 0x2000, [all...] |
H A D | sim-uqshl-4h-2opimm-trace-aarch64.h | 131 0xffff, 0xffff, 0x0000, 0x2000, 146 0xffff, 0x0000, 0x1000, 0x2000, 147 0xffff, 0x0000, 0x2000, 0x4000, 159 0x0000, 0x0200, 0x0400, 0x2000, 162 0x0000, 0x1000, 0x2000, 0xffff, 163 0x0000, 0x2000, 0x4000, 0xffff, 175 0x0200, 0x0400, 0x2000, 0xfa00, 178 0x1000, 0x2000, 0xffff, 0xffff, 179 0x2000, 0x4000, 0xffff, 0xffff, 191 0x0400, 0x2000, [all...] |
H A D | sim-sli-4h-2opimm-trace-aarch64.h | 50 0x1fff, 0x2000, 0x3fff, 0x0000, 66 0x2000, 0x3fff, 0x0000, 0xdfff, 146 0xffff, 0x0000, 0x1fff, 0x2000, 159 0x0000, 0x03ff, 0x0400, 0x2000, 162 0x0000, 0x1fff, 0x2000, 0x0000, 175 0x03ff, 0x0400, 0x2000, 0xfbff, 178 0x1fff, 0x2000, 0x0000, 0xdfff, 191 0x0400, 0x2000, 0xfbff, 0xfc00, 194 0x2000, 0x0000, 0xdfff, 0xe000, 207 0x2000, [all...] |
/device/soc/hisilicon/common/platform/hieth-sf/include/internal/ |
H A D | eth_phy.h | 32 #define BMCR_SPEED100 0x2000 43 #define BMSR_100HALF 0x2000 56 #define ANLPAR_RF 0x2000 69 #define PHY_1000BTSR_LRS 0x2000 77 #define EXSR_1000TF 0x2000
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/third_party/musl/src/ctype/ |
H A D | casemap.h | 171 0x0, 0x2001, -0x2000, 0x1dbf00, 0x2e700, 0x7900, 185 -0x2000, 0x101, -0x100, 0x5400, 0x7401, 0x2601, 190 0x2001, -0x2000, 0x5001, 0xf01, -0xf00, 0x0, 208 0x0, 0x2001, -0x2000, 0x0, 0x2801, -0x2800, 209 0x0, 0x4001, -0x4000, 0x0, 0x2001, -0x2000, 210 0x0, 0x2001, -0x2000, 0x0, 0x2201, -0x2200,
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/device/board/hisilicon/hispark_taurus/liteos_a/board/include/asm/ |
H A D | platform.h | 35 #define GICC_OFFSET 0x2000 /* CPU interface register offset */ 54 #define GPIO2_REG_BASE IO_DEVICE_ADDR(GPIO_REG_ADDR + 0x2000) 59 #define SPI2_REG_BASE (SPI_REG_ADDR + 0x2000) 69 #define I2C2_REG_PBASE (I2C_REG_ADDR + 0x2000) 85 #define UART2_REG_PBASE (UART_REG_ADDR + 0x2000) 108 #define ETH_REG_OFFSIZE 0x2000
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/third_party/FreeBSD/sys/dev/mii/ |
H A D | mii.h | 53 #define BMCR_SPEED0 0x2000 /* speed selection (LSB) */ 71 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */ 113 #define ANAR_RF 0x2000 /* remote fault (ro) */ 139 #define ANLPAR_RF 0x2000 /* remote fault (ro) */ 188 #define GTSR_LRS 0x2000 /* local rx status, 1 = ok */ 233 #define EXTSR_1000TFDX 0x2000 /* 1000T full-duplex capable */
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/device/soc/hisilicon/hi3861v100/sdk_liteos/include/ |
H A D | hi3861_platform.h | 24 #define PKT_H_LEN 0x2000 /* PKT_H:8K MIN:7K */ 25 #define PKT_B_START_ADDR (0x03100000 + 0x2000 + 0x4000) 31 #define PKT_H_LEN 0x2000 /* PKT_H:8K MIN:7K */
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/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/common/partition_table/ |
H A D | load_partition_table.c | 33 #define PRODUCT_CFG_DEFAULT_FNV_SIZE 0x2000 /* 8K */ 34 #define PRODUCT_CFG_DEFAULT_NORMAL_NV_SIZE 0x2000 /* 8K */ 38 #define PRODUCT_CFG_DEFAULT_HILINK_SIZE 0x2000 /* 8K */ 41 #define PRODUCT_CFG_DEFAULT_HILINK_PKI_SIZE 0x2000 /* 8K */
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/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/common/partition_table/ |
H A D | boot_partition_table.c | 32 #define PRODUCT_CFG_DEFAULT_FNV_SIZE 0x2000 /* 8K */ 33 #define PRODUCT_CFG_DEFAULT_NORMAL_NV_SIZE 0x2000 /* 8K */ 37 #define PRODUCT_CFG_DEFAULT_HILINK_SIZE 0x2000 /* 8K */ 40 #define PRODUCT_CFG_DEFAULT_HILINK_PKI_SIZE 0x2000 /* 8K */
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/third_party/ltp/include/lapi/ |
H A D | timex.h | 19 # define ADJ_NANO 0x2000 23 # define STA_NANO 0x2000
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/third_party/pulseaudio/src/pulsecore/ |
H A D | g711.h | 21 extern uint8_t _st_13linear2alaw[0x2000]; 33 #define st_14linear2ulaw(sw) (_st_14linear2ulaw[(sw + 0x2000)])
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/third_party/elfutils/tests/ |
H A D | dwfl-bug-getmodules.c | 35 if (base != 0x2000) in iterate() 50 dwfl_report_module (dwfl, "m2", 0x2000, 0x3000); in main()
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/device/board/hisilicon/hispark_aries/liteos_a/board/include/asm/ |
H A D | platform.h | 35 #define GICC_OFFSET 0x2000 /* CPU interface register offset */ 51 #define ETH_REG_OFFSIZE 0x2000 60 #define GPIO2_REG_BASE (GPIO_REG_BASE + 0x2000)
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