Home
last modified time | relevance | path

Searched refs:reg (Results 1 - 25 of 1579) sorted by relevance

12345678910>>...64

/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.c26 static void analogix_dp_write(struct analogix_dp_device *dp, u32 reg, u32 val) in analogix_dp_write() argument
30 writel(val, dp->reg_base + reg); in analogix_dp_write()
33 writel(val, dp->reg_base + reg); in analogix_dp_write()
36 static u32 analogix_dp_read(struct analogix_dp_device *dp, u32 reg) in analogix_dp_read() argument
39 readl(dp->reg_base + reg); in analogix_dp_read()
42 return readl(dp->reg_base + reg); in analogix_dp_read()
47 u32 reg; in analogix_dp_enable_video_mute() local
50 reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
51 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
52 analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg); in analogix_dp_enable_video_mute()
62 u32 reg; analogix_dp_stop_video() local
71 u32 reg; analogix_dp_lane_swap() local
84 u32 reg; analogix_dp_init_analog_param() local
138 u32 reg; analogix_dp_reset() local
190 u32 reg; analogix_dp_config_interrupt() local
211 u32 reg; analogix_dp_mute_hpd_interrupt() local
225 u32 reg; analogix_dp_unmute_hpd_interrupt() local
238 u32 reg; analogix_dp_get_pll_lock_status() local
250 u32 reg; analogix_dp_set_pll_power_down() local
270 u32 reg; analogix_dp_set_analog_power_down() local
385 u32 reg; analogix_dp_init_analog_func() local
408 u32 reg; analogix_dp_clear_hotplug_interrupts() local
423 u32 reg; analogix_dp_init_hpd() local
438 u32 reg; analogix_dp_force_hpd() local
447 u32 reg; analogix_dp_get_irq_type() local
468 u32 reg; analogix_dp_reset_aux() local
478 u32 reg; analogix_dp_init_aux() local
515 u32 reg; analogix_dp_get_plug_in_status() local
533 u32 reg; analogix_dp_enable_sw_function() local
542 u32 reg; analogix_dp_ssc_enable() local
559 u32 reg; analogix_dp_ssc_disable() local
611 u32 reg; analogix_dp_get_link_bandwidth() local
619 u32 reg; analogix_dp_set_lane_count() local
642 u32 reg; analogix_dp_get_lane_count() local
690 u32 reg; analogix_dp_enable_enhanced_mode() local
705 u32 reg; analogix_dp_set_training_pattern() local
739 u32 reg; analogix_dp_reset_macro() local
754 u32 reg; analogix_dp_init_video() local
774 u32 reg; analogix_dp_set_video_color_format() local
794 u32 reg; analogix_dp_is_slave_video_stream_clock_on() local
822 u32 reg; analogix_dp_set_video_cr_mn() local
854 u32 reg; analogix_dp_set_video_timing_mode() local
869 u32 reg; analogix_dp_enable_video_master() local
886 u32 reg; analogix_dp_start_video() local
895 u32 reg; analogix_dp_is_video_stream_on() local
911 u32 reg; analogix_dp_config_video_slave_mode() local
943 u32 reg; analogix_dp_enable_scrambling() local
952 u32 reg; analogix_dp_disable_scrambling() local
1074 u32 reg; analogix_dp_transfer() local
1247 u32 reg; analogix_dp_video_bist_enable() local
1263 u32 reg; analogix_dp_audio_config_i2s() local
1276 u32 reg; analogix_dp_audio_config_spdif() local
1289 u32 reg; analogix_dp_audio_enable() local
1302 u32 reg; analogix_dp_audio_disable() local
[all...]
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_cs.h43 radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() argument
45 assert(reg >= SI_CONFIG_REG_OFFSET && reg < SI_CONFIG_REG_END); in radeon_set_config_reg_seq()
49 radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); in radeon_set_config_reg_seq()
53 radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg() argument
55 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
60 radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq() argument
62 assert(reg >= SI_CONTEXT_REG_OFFSET && reg < SI_CONTEXT_REG_END); in radeon_set_context_reg_seq()
66 radeon_emit(cs, (reg in radeon_set_context_reg_seq()
70 radeon_set_context_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) radeon_set_context_reg() argument
77 radeon_set_context_reg_idx(struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, unsigned value) radeon_set_context_reg_idx() argument
87 radeon_set_context_reg_rmw(struct radeon_cmdbuf *cs, unsigned reg, unsigned value, unsigned mask) radeon_set_context_reg_rmw() argument
98 radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) radeon_set_sh_reg_seq() argument
108 radeon_set_sh_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) radeon_set_sh_reg() argument
115 radeon_set_sh_reg_idx(const struct radv_physical_device *pdevice, struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, unsigned value) radeon_set_sh_reg_idx() argument
132 gfx10_set_sh_reg_idx3(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) gfx10_set_sh_reg_idx3() argument
143 radeon_set_uconfig_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) radeon_set_uconfig_reg_seq() argument
153 radeon_set_uconfig_reg_seq_perfctr(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) radeon_set_uconfig_reg_seq_perfctr() argument
163 radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) radeon_set_uconfig_reg() argument
170 radeon_set_uconfig_reg_idx(const struct radv_physical_device *pdevice, struct radeon_cmdbuf *cs, unsigned reg, unsigned idx, unsigned value) radeon_set_uconfig_reg_idx() argument
188 radeon_set_perfctr_reg(struct radv_cmd_buffer *cmd_buffer, unsigned reg, unsigned value) radeon_set_perfctr_reg() argument
208 radeon_set_privileged_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) radeon_set_privileged_config_reg() argument
[all...]
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_build_pm4.h76 #define radeon_set_config_reg_seq(reg, num) do { \
77 SI_CHECK_SHADOWED_REGS(reg, num); \
78 assert((reg) < SI_CONTEXT_REG_OFFSET); \
80 radeon_emit(((reg) - SI_CONFIG_REG_OFFSET) >> 2); \
83 #define radeon_set_config_reg(reg, value) do { \
84 radeon_set_config_reg_seq(reg, 1); \
88 #define radeon_set_context_reg_seq(reg, num) do { \
89 SI_CHECK_SHADOWED_REGS(reg, num); \
90 assert((reg) >= SI_CONTEXT_REG_OFFSET); \
92 radeon_emit(((reg)
[all...]
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_sanity.c67 scan_register_key(const scan_register *reg) in scan_register_key() argument
69 unsigned key = reg->file; in scan_register_key()
70 key |= (reg->indices[0] << 4); in scan_register_key()
71 key |= (reg->indices[1] << 18); in scan_register_key()
77 fill_scan_register1d(scan_register *reg, in fill_scan_register1d() argument
80 reg->file = file; in fill_scan_register1d()
81 reg->dimensions = 1; in fill_scan_register1d()
82 reg->indices[0] = index; in fill_scan_register1d()
83 reg->indices[1] = 0; in fill_scan_register1d()
87 fill_scan_register2d(scan_register *reg, in fill_scan_register2d() argument
97 scan_register_dst(scan_register *reg, struct tgsi_full_dst_register *dst) scan_register_dst() argument
115 scan_register_src(scan_register *reg, struct tgsi_full_src_register *src) scan_register_src() argument
135 scan_register *reg = MALLOC(sizeof(scan_register)); create_scan_register_src() local
144 scan_register *reg = MALLOC(sizeof(scan_register)); create_scan_register_dst() local
201 is_register_declared( struct sanity_check_ctx *ctx, const scan_register *reg) is_register_declared() argument
220 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); is_any_register_declared() local
230 is_register_used( struct sanity_check_ctx *ctx, scan_register *reg) is_register_used() argument
242 is_ind_register_used( struct sanity_check_ctx *ctx, scan_register *reg) is_ind_register_used() argument
264 check_register_usage( struct sanity_check_ctx *ctx, scan_register *reg, const char *name, boolean indirect_access ) check_register_usage() argument
341 scan_register *reg = create_scan_register_dst(&inst->Dst[i]); iter_instruction() local
352 scan_register *reg = create_scan_register_src(&inst->Src[i]); iter_instruction() local
378 check_and_declare(struct sanity_check_ctx *ctx, scan_register *reg) check_and_declare() argument
423 scan_register *reg = MALLOC(sizeof(scan_register)); iter_declaration() local
431 scan_register *reg = MALLOC(sizeof(scan_register)); iter_declaration() local
436 scan_register *reg = MALLOC(sizeof(scan_register)); iter_declaration() local
455 scan_register *reg; iter_immediate() local
528 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); epilog() local
550 scan_register *reg = (scan_register *)cso_hash_iter_data(iter); regs_hash_destroy() local
[all...]
/third_party/backends/backend/genesys/
H A Dgl842.cpp42 dev.reg.clear(); in gl842_init_registers()
45 dev.reg.init_reg(0x01, 0x00); in gl842_init_registers()
46 dev.reg.init_reg(0x02, 0x78); in gl842_init_registers()
47 dev.reg.init_reg(0x03, 0xbf); in gl842_init_registers()
48 dev.reg.init_reg(0x04, 0x22); in gl842_init_registers()
49 dev.reg.init_reg(0x05, 0x48); in gl842_init_registers()
51 dev.reg.init_reg(0x06, 0xb8); in gl842_init_registers()
53 dev.reg.init_reg(0x07, 0x00); in gl842_init_registers()
54 dev.reg.init_reg(0x08, 0x00); in gl842_init_registers()
55 dev.reg in gl842_init_registers()
267 gl842_init_motor_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, const ScanSession& session, Genesys_Register_Set* reg, const MotorProfile& motor_profile, unsigned int exposure, unsigned scan_yres, unsigned int scan_lines, unsigned int scan_dummy, unsigned int feed_steps, ScanFlag flags) gl842_init_motor_regs_scan() argument
410 gl842_init_optical_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, unsigned int exposure, const ScanSession& session) gl842_init_optical_regs_scan() argument
528 init_regs_for_scan_session(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, const ScanSession& session) const init_regs_for_scan_session() argument
671 begin_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, bool start_motor) const begin_scan() argument
737 end_scan(Genesys_Device* dev, Genesys_Register_Set* reg, bool check_stop) const end_scan() argument
[all...]
H A Dgl846.cpp59 dev->reg.clear(); in gl846_init_registers()
61 dev->reg.init_reg(0x01, 0x60); in gl846_init_registers()
65 dev->reg.init_reg(0x01, 0x22); in gl846_init_registers()
67 dev->reg.init_reg(0x02, 0x38); in gl846_init_registers()
68 dev->reg.init_reg(0x03, 0x03); in gl846_init_registers()
72 dev->reg.init_reg(0x03, 0xbf); in gl846_init_registers()
74 dev->reg.init_reg(0x04, 0x22); in gl846_init_registers()
75 dev->reg.init_reg(0x05, 0x60); in gl846_init_registers()
79 dev->reg.init_reg(0x05, 0x48); in gl846_init_registers()
81 dev->reg in gl846_init_registers()
338 gl846_init_motor_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, const ScanSession& session, Genesys_Register_Set* reg, const MotorProfile& motor_profile, unsigned int scan_exposure_time, unsigned scan_yres, unsigned int scan_lines, unsigned int scan_dummy, unsigned int feed_steps, ScanFlag flags) gl846_init_motor_regs_scan() argument
514 gl846_init_optical_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, unsigned int exposure_time, const ScanSession& session) gl846_init_optical_regs_scan() argument
619 init_regs_for_scan_session(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, const ScanSession& session) const init_regs_for_scan_session() argument
747 begin_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, bool start_motor) const begin_scan() argument
771 end_scan(Genesys_Device* dev, Genesys_Register_Set* reg, bool check_stop) const end_scan() argument
[all...]
H A Dgl124.cpp76 dev->reg.clear(); in gl124_init_registers()
79 dev->reg.init_reg(0x01, 0xa2); // + REG_0x01_SHDAREA in gl124_init_registers()
80 dev->reg.init_reg(0x02, 0x90); in gl124_init_registers()
81 dev->reg.init_reg(0x03, 0x50); in gl124_init_registers()
82 dev->reg.init_reg(0x04, 0x03); in gl124_init_registers()
83 dev->reg.init_reg(0x05, 0x00); in gl124_init_registers()
86 dev->reg.init_reg(0x06, 0x50); in gl124_init_registers()
87 dev->reg.init_reg(0x07, 0x00); in gl124_init_registers()
89 dev->reg.init_reg(0x03, 0x50 & ~REG_0x03_AVEENB); in gl124_init_registers()
90 dev->reg in gl124_init_registers()
422 gl124_init_motor_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, const MotorProfile& motor_profile, unsigned int scan_exposure_time, unsigned scan_yres, unsigned int scan_lines, unsigned int scan_dummy, unsigned int feed_steps, ScanColorMode scan_mode, ScanFlag flags) gl124_init_motor_regs_scan() argument
576 gl124_init_optical_regs_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, unsigned int exposure_time, const ScanSession& session) gl124_init_optical_regs_scan() argument
699 init_regs_for_scan_session(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, const ScanSession& session) const init_regs_for_scan_session() argument
872 begin_scan(Genesys_Device* dev, const Genesys_Sensor& sensor, Genesys_Register_Set* reg, bool start_motor) const begin_scan() argument
896 end_scan(Genesys_Device* dev, Genesys_Register_Set* reg, bool check_stop) const end_scan() argument
[all...]
/third_party/libunwind/libunwind/src/arm/
H A DGstash_frame.c39 rs->reg.where[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
40 rs->reg.val[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
41 rs->reg.val[DWARF_CFA_OFF_COLUMN], in tdep_stash_frame()
43 rs->reg.where[R7], rs->reg.val[R7], DWARF_GET_LOC(d->loc[R7]), in tdep_stash_frame()
44 rs->reg.where[LR], rs->reg.val[LR], DWARF_GET_LOC(d->loc[LR]), in tdep_stash_frame()
45 rs->reg.where[SP], rs->reg.val[SP], DWARF_GET_LOC(d->loc[SP])); in tdep_stash_frame()
54 && (rs->reg in tdep_stash_frame()
[all...]
/third_party/libunwind/libunwind/src/aarch64/
H A DGstash_frame.c39 rs->reg.where[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
40 rs->reg.val[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
41 rs->reg.val[DWARF_CFA_OFF_COLUMN], in tdep_stash_frame()
43 rs->reg.where[FP], rs->reg.val[FP], DWARF_GET_LOC(d->loc[FP]), in tdep_stash_frame()
44 rs->reg.where[LR], rs->reg.val[LR], DWARF_GET_LOC(d->loc[LR]), in tdep_stash_frame()
45 rs->reg.where[SP], rs->reg.val[SP], DWARF_GET_LOC(d->loc[SP])); in tdep_stash_frame()
54 && (rs->reg in tdep_stash_frame()
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_kbase_mem_linux.c54 * @reg: The GPU region
64 struct kbase_va_region *reg,
70 * @reg: The GPU region or NULL if there isn't one
81 struct kbase_va_region *reg,
91 struct kbase_va_region *reg; in kbase_mem_alloc() local
149 reg = kbase_alloc_free_region(kctx, 0, va_pages, zone); in kbase_mem_alloc()
150 if (!reg) { in kbase_mem_alloc()
155 if (kbase_update_region_flags(kctx, reg, *flags) != 0) in kbase_mem_alloc()
158 if (kbase_reg_prepare_native(reg, kctx) != 0) { in kbase_mem_alloc()
164 reg in kbase_mem_alloc()
261 struct kbase_va_region *reg; kbase_mem_query() local
582 struct kbase_va_region *reg; kbase_mem_flags_change() local
696 struct kbase_va_region *reg; kbase_mem_from_ump() local
815 struct kbase_va_region *reg; kbase_mem_from_umm() local
924 struct kbase_va_region *reg; kbase_mem_from_user_buffer() local
1107 struct kbase_va_region *reg; global() local
1296 struct kbase_va_region *reg; global() local
1439 kbase_mem_grow_gpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
1457 kbase_mem_shrink_cpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
1472 kbase_mem_shrink_gpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
1490 struct kbase_va_region *reg; global() local
1713 kbase_cpu_mmap(struct kbase_va_region *reg, struct vm_area_struct *vma, void *kaddr, size_t nr_pages, unsigned long aligned_offset, int free_on_close) global() argument
1813 kbase_trace_buffer_mmap(struct kbase_context *kctx, struct vm_area_struct *vma, struct kbase_va_region **const reg, void **const kaddr) global() argument
1898 kbase_mmu_dump_mmap(struct kbase_context *kctx, struct vm_area_struct *vma, struct kbase_va_region **const reg, void **const kmap_addr) global() argument
1977 struct kbase_va_region *reg; global() local
2041 struct kbase_va_region *reg = NULL; global() local
2184 struct kbase_va_region *reg; global() local
2455 struct kbase_va_region *reg; global() local
2544 struct kbase_va_region *reg; global() local
[all...]
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_reg.h407 struct brw_reg reg; in brw_reg() local
417 reg.type = type; in brw_reg()
418 reg.file = file; in brw_reg()
419 reg.negate = negate; in brw_reg()
420 reg.abs = abs; in brw_reg()
421 reg.address_mode = BRW_ADDRESS_DIRECT; in brw_reg()
422 reg.pad0 = 0; in brw_reg()
423 reg.subnr = subnr * type_sz(type); in brw_reg()
424 reg.nr = nr; in brw_reg()
426 /* Could do better: If the reg i in brw_reg()
[all...]
H A Dbrw_ir_fs.h39 fs_reg(struct ::brw_reg reg);
58 negate(fs_reg reg) in negate() argument
60 assert(reg.file != IMM); in negate()
61 reg.negate = !reg.negate; in negate()
62 return reg; in negate()
66 retype(fs_reg reg, enum brw_reg_type type) in retype() argument
68 reg.type = type; in retype()
69 return reg; in retype()
73 byte_offset(fs_reg reg, unsigne argument
104 horiz_offset(const fs_reg &reg, unsigned delta) horiz_offset() argument
132 offset(fs_reg reg, unsigned width, unsigned delta) offset() argument
155 component(fs_reg reg, unsigned idx) component() argument
248 is_periodic(const fs_reg &reg, unsigned n) is_periodic() argument
272 is_uniform(const fs_reg &reg) is_uniform() argument
281 quarter(const fs_reg &reg, unsigned idx) quarter() argument
[all...]
H A Dbrw_clip_line.c46 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; in brw_clip_line_alloc_regs()
49 c->reg.fixed_planes = brw_vec4_grf(i, 0); in brw_clip_line_alloc_regs()
61 c->reg.vertex[j] = brw_vec4_grf(i, 0); in brw_clip_line_alloc_regs()
65 c->reg.t = brw_vec1_grf(i, 0); in brw_clip_line_alloc_regs()
66 c->reg.t0 = brw_vec1_grf(i, 1); in brw_clip_line_alloc_regs()
67 c->reg.t1 = brw_vec1_grf(i, 2); in brw_clip_line_alloc_regs()
68 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD); in brw_clip_line_alloc_regs()
69 c->reg.plane_equation = brw_vec4_grf(i, 4); in brw_clip_line_alloc_regs()
72 c->reg.dp0 = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */ in brw_clip_line_alloc_regs()
73 c->reg in brw_clip_line_alloc_regs()
[all...]
H A Dbrw_clip_tri.c53 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; in brw_clip_tri_alloc_regs()
56 c->reg.fixed_planes = brw_vec4_grf(i, 0); in brw_clip_tri_alloc_regs()
68 c->reg.vertex[j] = brw_vec4_grf(i, 0); in brw_clip_tri_alloc_regs()
79 brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0)); in brw_clip_tri_alloc_regs()
83 c->reg.t = brw_vec1_grf(i, 0); in brw_clip_tri_alloc_regs()
84 c->reg.loopcount = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_D); in brw_clip_tri_alloc_regs()
85 c->reg.nr_verts = retype(brw_vec1_grf(i, 2), BRW_REGISTER_TYPE_UD); in brw_clip_tri_alloc_regs()
86 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD); in brw_clip_tri_alloc_regs()
87 c->reg.plane_equation = brw_vec4_grf(i, 4); in brw_clip_tri_alloc_regs()
90 c->reg in brw_clip_tri_alloc_regs()
[all...]
H A Dbrw_compile_ff_gs.c64 } reg; member
90 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; in brw_ff_gs_alloc_regs()
94 c->reg.SVBI = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); in brw_ff_gs_alloc_regs()
99 c->reg.vertex[j] = brw_vec4_grf(i, 0); in brw_ff_gs_alloc_regs()
103 c->reg.header = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); in brw_ff_gs_alloc_regs()
104 c->reg.temp = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); in brw_ff_gs_alloc_regs()
107 c->reg.destination_indices = in brw_ff_gs_alloc_regs()
117 * Set up the initial value of c->reg.header register based on c->reg.R0.
133 brw_MOV(p, c->reg in brw_ff_gs_initialize_header()
[all...]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_mem_linux.c98 struct kbase_va_region *reg, u64 offset_bytes,
107 struct kbase_va_region *const reg,
120 struct kbase_va_region *reg; in kbase_find_event_mem_region() local
124 list_for_each_entry(reg, &kctx->csf.event_pages_head, link) in kbase_find_event_mem_region()
126 if ((reg->start_pfn <= gpu_pfn) && in kbase_find_event_mem_region()
127 (gpu_pfn < (reg->start_pfn + reg->nr_pages))) { in kbase_find_event_mem_region()
128 if (WARN_ON(reg->flags & KBASE_REG_FREE)) { in kbase_find_event_mem_region()
132 if (WARN_ON(!(reg->flags & KBASE_REG_CSF_EVENT))) { in kbase_find_event_mem_region()
136 return reg; in kbase_find_event_mem_region()
179 kbase_phy_alloc_mapping_init(struct kbase_context *kctx, struct kbase_va_region *reg, size_t vsize, size_t size) kbase_phy_alloc_mapping_init() argument
248 struct kbase_va_region *reg; kbase_phy_alloc_mapping_get() local
312 struct kbase_va_region *reg; kbase_mem_alloc() local
555 struct kbase_va_region *reg; kbase_mem_query() local
927 struct kbase_va_region *reg; kbase_mem_flags_change() local
1075 kbase_mem_do_sync_imported(struct kbase_context *kctx, struct kbase_va_region *reg, enum kbase_sync_type sync_fn) kbase_mem_do_sync_imported() argument
1209 kbase_mem_umm_map_attachment(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_mem_umm_map_attachment() argument
1274 kbase_mem_umm_map(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_mem_umm_map() argument
1348 kbase_mem_umm_unmap(struct kbase_context *kctx, struct kbase_va_region *reg, struct kbase_mem_phy_alloc *alloc) kbase_mem_umm_unmap() argument
1413 struct kbase_va_region *reg; kbase_mem_from_umm() local
1569 struct kbase_va_region *reg; kbase_mem_from_user_buffer() local
1784 struct kbase_va_region *reg; global() local
1995 struct kbase_va_region *reg; global() local
2133 kbase_mem_grow_gpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
2153 kbase_mem_shrink_cpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
2182 kbase_mem_shrink_gpu_mapping(struct kbase_context *const kctx, struct kbase_va_region *const reg, u64 const new_pages, u64 const old_pages) global() argument
2202 struct kbase_va_region *reg; global() local
2320 kbase_mem_shrink(struct kbase_context *const kctx, struct kbase_va_region *const reg, u64 const new_pages) global() argument
2405 get_aliased_alloc(struct vm_area_struct *vma, struct kbase_va_region *reg, pgoff_t *start_off, size_t nr_pages) global() argument
2516 kbase_cpu_mmap(struct kbase_context *kctx, struct kbase_va_region *reg, struct vm_area_struct *vma, void *kaddr, size_t nr_pages, unsigned long aligned_offset, int free_on_close) global() argument
2630 kbase_mmu_dump_mmap(struct kbase_context *kctx, struct vm_area_struct *vma, struct kbase_va_region **const reg, void **const kmap_addr) global() argument
2714 struct kbase_va_region *reg; global() local
2778 struct kbase_va_region *reg = NULL; global() local
2980 kbase_vmap_phy_pages(struct kbase_context *kctx, struct kbase_va_region *reg, u64 offset_bytes, size_t size, struct kbase_vmap_struct *map) global() argument
3069 struct kbase_va_region *reg; global() local
[all...]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_mem_linux.c96 struct kbase_va_region *reg, u64 offset_bytes, size_t size,
104 struct kbase_va_region *reg,
116 struct kbase_va_region *reg; in kbase_find_event_mem_region() local
120 list_for_each_entry(reg, &kctx->csf.event_pages_head, link) { in kbase_find_event_mem_region()
121 if ((reg->start_pfn <= gpu_pfn) && in kbase_find_event_mem_region()
122 (gpu_pfn < (reg->start_pfn + reg->nr_pages))) { in kbase_find_event_mem_region()
123 if (WARN_ON(reg->flags & KBASE_REG_FREE)) in kbase_find_event_mem_region()
126 if (WARN_ON(!(reg->flags & KBASE_REG_CSF_EVENT))) in kbase_find_event_mem_region()
129 return reg; in kbase_find_event_mem_region()
172 kbase_phy_alloc_mapping_init(struct kbase_context *kctx, struct kbase_va_region *reg, size_t vsize, size_t size) kbase_phy_alloc_mapping_init() argument
237 struct kbase_va_region *reg; kbase_phy_alloc_mapping_get() local
300 struct kbase_va_region *reg; kbase_mem_alloc() local
523 struct kbase_va_region *reg; kbase_mem_query() local
883 struct kbase_va_region *reg; kbase_mem_flags_change() local
1028 kbase_mem_do_sync_imported(struct kbase_context *kctx, struct kbase_va_region *reg, enum kbase_sync_type sync_fn) kbase_mem_do_sync_imported() argument
1158 kbase_mem_umm_map_attachment(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_mem_umm_map_attachment() argument
1221 kbase_mem_umm_map(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_mem_umm_map() argument
1301 kbase_mem_umm_unmap(struct kbase_context *kctx, struct kbase_va_region *reg, struct kbase_mem_phy_alloc *alloc) kbase_mem_umm_unmap() argument
1368 struct kbase_va_region *reg; kbase_mem_from_umm() local
1518 struct kbase_va_region *reg; kbase_mem_from_user_buffer() local
1729 struct kbase_va_region *reg; global() local
1956 struct kbase_va_region *reg; global() local
2096 kbase_mem_grow_gpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages, enum kbase_caller_mmu_sync_info mmu_sync_info) global() argument
2118 kbase_mem_shrink_cpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_pages, u64 old_pages) global() argument
2146 kbase_mem_shrink_gpu_mapping(struct kbase_context *const kctx, struct kbase_va_region *const reg, u64 const new_pages, u64 const old_pages) global() argument
2164 struct kbase_va_region *reg; global() local
2291 kbase_mem_shrink(struct kbase_context *const kctx, struct kbase_va_region *const reg, u64 const new_pages) global() argument
2373 get_aliased_alloc(struct vm_area_struct *vma, struct kbase_va_region *reg, pgoff_t *start_off, size_t nr_pages) global() argument
2484 kbase_cpu_mmap(struct kbase_context *kctx, struct kbase_va_region *reg, struct vm_area_struct *vma, void *kaddr, size_t nr_pages, unsigned long aligned_offset, int free_on_close) global() argument
2594 kbase_mmu_dump_mmap(struct kbase_context *kctx, struct vm_area_struct *vma, struct kbase_va_region **const reg, void **const kmap_addr) global() argument
2680 struct kbase_va_region *reg; global() local
2755 struct kbase_va_region *reg = NULL; global() local
2956 kbase_vmap_phy_pages(struct kbase_context *kctx, struct kbase_va_region *reg, u64 offset_bytes, size_t size, struct kbase_vmap_struct *map) global() argument
3036 struct kbase_va_region *reg; global() local
[all...]
H A Dmali_kbase_mem.c177 struct kbase_va_region *reg; in find_region_enclosing_range_rbtree() local
185 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in find_region_enclosing_range_rbtree()
186 tmp_start_pfn = reg->start_pfn; in find_region_enclosing_range_rbtree()
187 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in find_region_enclosing_range_rbtree()
196 return reg; in find_region_enclosing_range_rbtree()
207 struct kbase_va_region *reg; in kbase_find_region_enclosing_address() local
214 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_find_region_enclosing_address()
215 tmp_start_pfn = reg->start_pfn; in kbase_find_region_enclosing_address()
216 tmp_end_pfn = reg in kbase_find_region_enclosing_address()
254 struct kbase_va_region *reg = NULL; kbase_find_region_base_address() local
294 struct kbase_va_region *reg = NULL; kbase_region_tracker_find_region_meeting_reqs() local
362 kbase_remove_va_region(struct kbase_device *kbdev, struct kbase_va_region *reg) kbase_remove_va_region() argument
555 kbase_add_va_region(struct kbase_context *kctx, struct kbase_va_region *reg, u64 addr, size_t nr_pages, size_t align) kbase_add_va_region() argument
617 kbase_add_va_region_rbtree(struct kbase_device *kbdev, struct kbase_va_region *reg, u64 addr, size_t nr_pages, size_t align) kbase_add_va_region_rbtree() argument
726 struct kbase_va_region *reg; kbase_region_tracker_erase_rbtree() local
900 struct kbase_va_region *reg; kbase_region_tracker_has_allocs() local
1382 kbase_reg_flags_to_kctx( struct kbase_va_region *reg) kbase_reg_flags_to_kctx() argument
1420 kbase_free_alloced_region(struct kbase_va_region *reg) kbase_free_alloced_region() argument
1502 kbase_gpu_mmap(struct kbase_context *kctx, struct kbase_va_region *reg, u64 addr, size_t nr_pages, size_t align, enum kbase_caller_mmu_sync_info mmu_sync_info) kbase_gpu_mmap() argument
1622 kbase_gpu_munmap(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_gpu_munmap() argument
1849 struct kbase_va_region *reg; kbase_do_syncset() local
1977 kbase_mem_free_region(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_mem_free_region() argument
2039 struct kbase_va_region *reg; kbase_mem_free() local
2100 kbase_update_region_flags(struct kbase_context *kctx, struct kbase_va_region *reg, unsigned long flags) kbase_update_region_flags() argument
2941 kbase_alloc_phy_pages(struct kbase_va_region *reg, size_t vsize, size_t size) kbase_alloc_phy_pages() argument
3342 struct kbase_va_region *reg; kbase_jit_debugfs_vm_get() local
3366 struct kbase_va_region *reg; kbase_jit_debugfs_phys_get() local
3391 struct kbase_va_region *reg; kbase_jit_debugfs_used_get() local
3418 struct kbase_va_region *reg; kbase_jit_debugfs_trim_get() local
3519 struct kbase_va_region *reg; kbase_jit_destroy_worker() local
3595 kbase_mem_jit_trim_pages_from_region(struct kbase_context *kctx, struct kbase_va_region *reg, size_t pages_needed, size_t *freed, bool shrink) kbase_mem_jit_trim_pages_from_region() argument
3728 struct kbase_va_region *reg, *tmp; kbase_mem_jit_trim_pages() local
3762 kbase_jit_grow(struct kbase_context *kctx, const struct base_jit_alloc_info *info, struct kbase_va_region *reg, struct kbase_sub_alloc **prealloc_sas, enum kbase_caller_mmu_sync_info mmu_sync_info) kbase_jit_grow() argument
4074 struct kbase_va_region *reg = NULL; kbase_jit_allocate() local
4292 kbase_jit_free(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_jit_free() argument
4351 kbase_jit_backing_lost(struct kbase_va_region *reg) kbase_jit_backing_lost() argument
4379 struct kbase_va_region *reg = NULL; kbase_jit_evict() local
4446 kbase_trace_jit_report_gpu_mem_trace_enabled(struct kbase_context *kctx, struct kbase_va_region *reg, unsigned int flags) kbase_trace_jit_report_gpu_mem_trace_enabled() argument
4491 kbase_jit_report_update_pressure(struct kbase_context *kctx, struct kbase_va_region *reg, u64 new_used_pages, unsigned int flags) kbase_jit_report_update_pressure() argument
4554 kbase_jd_user_buf_pin_pages(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_jd_user_buf_pin_pages() argument
4628 kbase_jd_user_buf_map(struct kbase_context *kctx, struct kbase_va_region *reg) kbase_jd_user_buf_map() argument
4781 kbase_map_external_resource( struct kbase_context *kctx, struct kbase_va_region *reg, struct mm_struct *locked_mm) kbase_map_external_resource() argument
4822 kbase_unmap_external_resource(struct kbase_context *kctx, struct kbase_va_region *reg, struct kbase_mem_phy_alloc *alloc) kbase_unmap_external_resource() argument
4880 struct kbase_va_region *reg; kbase_sticky_resource_acquire() local
4937 struct kbase_va_region *reg; release_sticky_resource_meta() local
[all...]
/third_party/musl/porting/linux/user/include/sys/
H A Dsspret.h22 # define SSPRET_CALC_RETCOOKIE(reg) \
23 eor reg, reg, x30
25 # define SSPRET_LOAD_COOKIE(x, reg) \
26 mov reg, x29
28 # define SSPRET_SETUP(x, reg) \
29 SSPRET_LOAD_COOKIE(x, reg); \
30 SSPRET_CALC_RETCOOKIE(reg)
32 # define SSPRET_CHECK(x, reg) \
35 subs reg, re
[all...]
/third_party/musl/include/sys/linux/
H A Dsspret.h21 # define SSPRET_CALC_RETCOOKIE(reg) \
22 eor reg, reg, x30
24 # define SSPRET_LOAD_COOKIE(x, reg) \
25 mov reg, x29
27 # define SSPRET_SETUP(x, reg) \
28 SSPRET_LOAD_COOKIE(x, reg); \
29 SSPRET_CALC_RETCOOKIE(reg)
31 # define SSPRET_CHECK(x, reg) \
34 subs reg, re
[all...]
/third_party/lzma/Asm/arm64/
H A D7zAsm.S41 .macro p2_add reg:req, param:req
42 add \reg, \reg, \param
45 .macro p2_sub reg:req, param:req
46 sub \reg, \reg, \param
49 .macro p2_sub_s reg:req, param:req
50 subs \reg, \reg, \param
53 .macro p2_and reg
[all...]
/third_party/mesa3d/src/panfrost/bifrost/test/
H A Dtest-optimizer.cpp46 reg = bi_register(0); in Optimizer()
58 bi_index reg; member in Optimizer
66 CASE(bi_fadd_f32_to(b, reg, bi_fabsneg_f32(b, bi_abs(x)), y), in TEST_F()
67 bi_fadd_f32_to(b, reg, bi_abs(x), y)); in TEST_F()
69 CASE(bi_fadd_f32_to(b, reg, bi_fabsneg_f32(b, bi_neg(x)), y), in TEST_F()
70 bi_fadd_f32_to(b, reg, bi_neg(x), y)); in TEST_F()
72 CASE(bi_fadd_f32_to(b, reg, bi_fabsneg_f32(b, negabsx), y), in TEST_F()
73 bi_fadd_f32_to(b, reg, negabsx, y)); in TEST_F()
75 CASE(bi_fadd_f32_to(b, reg, bi_fabsneg_f32(b, x), y), in TEST_F()
76 bi_fadd_f32_to(b, reg, in TEST_F()
[all...]
/third_party/mesa3d/src/panfrost/bifrost/valhall/test/
H A Dtest-lower-isel.cpp45 reg = bi_register(1); in LowerIsel()
56 bi_index reg, x, y, z; member in LowerIsel
61 CASE(bi_swz_v4i8_to(b, reg, bi_byte(reg, i)), in TEST_F()
62 bi_iadd_v4u8_to(b, reg, bi_byte(reg, i), bi_zero(), false)); in TEST_F()
69 CASE(bi_swz_v2i16_to(b, reg, bi_swz_16(reg, i, j)), in TEST_F()
70 bi_iadd_v2u16_to(b, reg, bi_swz_16(reg, in TEST_F()
[all...]
/third_party/libunwind/libunwind/src/x86_64/
H A DGstash_frame.c37 rs->reg.where[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
38 rs->reg.val[DWARF_CFA_REG_COLUMN], in tdep_stash_frame()
39 rs->reg.val[DWARF_CFA_OFF_COLUMN], in tdep_stash_frame()
41 rs->reg.where[RBP], rs->reg.val[RBP], DWARF_GET_LOC(d->loc[RBP]), in tdep_stash_frame()
42 rs->reg.where[RSP], rs->reg.val[RSP], DWARF_GET_LOC(d->loc[RSP])); in tdep_stash_frame()
44 if (rs->reg.where[DWARF_CFA_REG_COLUMN] == DWARF_WHERE_EXPR && in tdep_stash_frame()
45 rs->reg.where[RBP] == DWARF_WHERE_EXPR) { in tdep_stash_frame()
49 unw_word_t cfa_addr = rs->reg in tdep_stash_frame()
[all...]
/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_emit.c47 i915_release_temp(struct i915_fp_compile *p, int reg) in i915_release_temp() argument
49 p->temp_flag &= ~(1 << reg); in i915_release_temp()
79 uint32_t reg = UREG(type, nr); in i915_emit_decl() local
83 return reg; in i915_emit_decl()
88 return reg; in i915_emit_decl()
92 return reg; in i915_emit_decl()
95 *(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags); in i915_emit_decl()
102 return reg; in i915_emit_decl()
200 temp = i915_get_temp(p); /* get temp reg index */ in i915_emit_texld()
204 A0_DEST_CHANNEL_ALL, /* dest reg, writemas in i915_emit_texld()
261 unsigned reg, idx; i915_emit_const1f() local
291 unsigned reg, idx; i915_emit_const2f() local
330 unsigned reg; i915_emit_const4f() local
[all...]

Completed in 17 milliseconds

12345678910>>...64