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/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/lwip_sack/include/lwip/
H A Dip6_addr.h61 u32_t addr[IP6_ADDR_U32_ARR_SIZE]; member
72 (ip6addr)->addr[index] = PP_HTONL(LWIP_MAKEU32(a, b, c, d))
77 (ip6addr)->addr[0] = idx0; \
78 (ip6addr)->addr[1] = idx1; \
79 (ip6addr)->addr[2] = idx2; \
80 (ip6addr)->addr[3] = idx3; \
84 #define IP6_ADDR_BLOCK1(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[0]) >> 16) & 0xffff))
86 #define IP6_ADDR_BLOCK2(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[0])) & 0xffff))
88 #define IP6_ADDR_BLOCK3(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[1]) >> 16) & 0xffff))
90 #define IP6_ADDR_BLOCK4(ip6addr) ((u16_t)((lwip_htonl((ip6addr)->addr[
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H A Dip4_addr.h55 u32_t addr; member
107 #define IP4_ADDR(ipaddr, a, b, c, d) (ipaddr)->addr = PP_HTONL(LWIP_MAKEU32(a, b, c, d))
110 #define ip4_addr_copy(dest, src) ((dest).addr = (src).addr)
112 #define ip4_addr_set(dest, src) ((dest)->addr = ((src) == NULL ? 0 : (src)->addr))
114 #define ip4_addr_set_zero(ipaddr) ((ipaddr)->addr = 0)
116 #define ip4_addr_set_any(ipaddr) ((ipaddr)->addr = IPADDR_ANY)
118 #define ip4_addr_set_loopback(ipaddr) ((ipaddr)->addr = PP_HTONL(IPADDR_LOOPBACK))
120 #define ip4_addr_isloopback(ipaddr) (((ipaddr)->addr
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H A Dinet.h193 * to binary notation of network byte order and store it in the structure that the addr parameter points to.
196 * @param[out] addr Indicates a the generated binary notation of the IPv4 address.
202 * of IPv4 address is updated in the addr parameter, instead of returning it.
207 int inet_aton(const char *cp, struct in_addr *addr);
209 #define inet_aton(cp, addr) ip4addr_aton(cp, (ip4_addr_t*)addr)
236 #define inet_ntoa(addr) ip4addr_ntoa((const ip4_addr_t*)&(addr))
247 * @param[in] addr Indicates the binary notation of an IPv4 address.
261 #define inet_ntoa_r(addr, bu
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/test/xts/hats/kernel/madvise/
H A DMadviseApiTest.cpp85 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); in HWTEST_F() local
86 ASSERT_TRUE(addr != MAP_FAILED); in HWTEST_F()
87 int err = madvise(addr, PAGE_SIZE, MADV_COLD); in HWTEST_F()
89 int ret = munmap(addr, PAGE_SIZE); in HWTEST_F()
91 addr = nullptr; in HWTEST_F()
104 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED | MAP_FILE, fd, 0); in HWTEST_F() local
105 ASSERT_TRUE(addr != MAP_FAILED); in HWTEST_F()
106 int ret = madvise(addr, PAGE_SIZE, MADV_COLD); in HWTEST_F()
108 ret = munmap(addr, PAGE_SIZE); in HWTEST_F()
110 addr in HWTEST_F()
127 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED | MAP_FILE, fd, 0); HWTEST_F() local
149 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); HWTEST_F() local
168 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); HWTEST_F() local
189 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED | MAP_FILE, fd, 0); HWTEST_F() local
213 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED | MAP_FILE, fd, 0); HWTEST_F() local
237 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0); HWTEST_F() local
258 char *addr = static_cast<char*>(mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, HWTEST_F() local
286 void *addr = mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_SHARED, -1, 0); HWTEST_F() local
303 char *addr = static_cast<char*>(mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, HWTEST_F() local
334 char *addr = static_cast<char*>(mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, HWTEST_F() local
372 char *addr = static_cast<char*>(mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, HWTEST_F() local
412 char *addr = static_cast<char*>(mmap(nullptr, PAGE_SIZE, PROT_READ | PROT_WRITE, HWTEST_F() local
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/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/kernel/include/
H A Dlos_base.h63 * Align the beginning of the object with the base address addr,
67 #define ALIGN(addr, boundary) LOS_Align(addr, boundary)
71 * Align the tail of the object with the base address addr, with size bytes being the smallest unit of alignment.
73 #define TRUNCATE(addr, size) ((addr) & ~((size)-1))
77 * Read a UINT8 value from addr and stroed in value.
79 #define READ_UINT8(value, addr) ((value) = *((volatile UINT8 *)(addr)))
82 * Read a UINT16 value from addr an
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/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/system/partition_table/
H A Dflash_partition_table.c51 #define PRODUCT_CFG_DEFAULT_FACTORY_BIN_ADDR 0x14D000 /* factory bin start addr */
69 table->table[HI_FLASH_PARTITON_BOOT].addr = PRODUCT_CFG_DEFAULT_BOOT_ADDR; in hi_flash_partition_init()
71 table->table[HI_FLASH_PARTITON_FACTORY_NV].addr = PRODUCT_CFG_DEFAULT_FNV_ADDR; in hi_flash_partition_init()
73 table->table[HI_FLASH_PARTITON_NORMAL_NV].addr = PRODUCT_CFG_DEFAULT_NORMAL_NV_ADDR; in hi_flash_partition_init()
75 table->table[HI_FLASH_PARTITON_NORMAL_NV_BACKUP].addr = PRODUCT_CFG_DEFAULT_NORMAL_NV_BACKUP_ADDR; in hi_flash_partition_init()
77 table->table[HI_FLASH_PARTITON_KERNEL_A].addr = PRODUCT_CFG_DEFAULT_KERNEL_A_ADDR; in hi_flash_partition_init()
79 table->table[HI_FLASH_PARTITON_KERNEL_B].addr = PRODUCT_CFG_DEFAULT_KERNEL_B_ADDR; in hi_flash_partition_init()
81 table->table[HI_FLASH_PARTITON_HILINK].addr = PRODUCT_CFG_DEFAULT_HILINK_ADDR; in hi_flash_partition_init()
83 table->table[HI_FLASH_PARTITON_FILE_SYSTEM].addr = PRODUCT_CFG_DEFAULT_FILE_SYSTEM_ADDR; in hi_flash_partition_init()
85 table->table[HI_FLASH_PARTITON_USR_RESERVE].addr in hi_flash_partition_init()
100 hi_get_hilink_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_hilink_partition_table() argument
113 hi_get_hilink_pki_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_hilink_pki_partition_table() argument
126 hi_get_crash_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_crash_partition_table() argument
139 hi_get_fs_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_fs_partition_table() argument
152 hi_get_normal_nv_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_normal_nv_partition_table() argument
165 hi_get_normal_nv_backup_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_normal_nv_backup_partition_table() argument
178 hi_get_usr_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_usr_partition_table() argument
191 hi_get_factory_bin_partition_table(hi_u32 *addr, hi_u32 *size) hi_get_factory_bin_partition_table() argument
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/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/libcoap/include/coap2/
H A Daddress.h32 ip_addr_t addr; member
37 && (IP_GET_TYPE(&(A)->addr) == IP_GET_TYPE(&(B)->addr)) \
38 && (ip_addr_isany(&(A)->addr) || ip_addr_isany(&(B)->addr) || !!ip_addr_cmp(&(A)->addr, &(B)->addr)))
40 #define _coap_address_isany_impl(A) ip_addr_isany(&(A)->addr)
42 #define _coap_is_mcast_impl(Address) ip_addr_ismulticast(&(Address)->addr)
49 uip_ipaddr_t addr; member
71 } addr; global() member
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/device/qemu/SmartL_E802/liteos_m/board/hals/csky_driver/src/
H A Dck_usart.c42 #define WAIT_USART_IDLE(addr)\
45 while ((addr->USR & USR_UART_BUSY) && (timecount < UART_BUSY_TIMEOUT)) {\
88 \param[in] addr usart base to operate.
95 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); in csi_usart_config_baudrate() local
98 WAIT_USART_IDLE(addr); in csi_usart_config_baudrate()
109 addr->LCR |= LCR_SET_DLAB; in csi_usart_config_baudrate()
111 addr->DLL = divisor & 0xff; in csi_usart_config_baudrate()
112 addr->DLH = (divisor >> 8) & 0xff; in csi_usart_config_baudrate()
117 addr->LCR &= (~LCR_SET_DLAB); in csi_usart_config_baudrate()
149 ck_usart_reg_t *addr in csi_usart_config_parity() local
188 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_config_stopbits() local
223 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_config_databits() local
273 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_getchar() local
292 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_putchar() local
320 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); ck_usart_intr_threshold_empty() local
361 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); ck_usart_intr_recv_data() local
388 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); ck_usart_intr_recv_line() local
472 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); ck_usart_intr_char_timeout() local
498 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); ck_usart_irqhandler() local
563 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_initialize() local
680 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_send() local
697 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_abort_send() local
745 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_receive_query() local
817 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_get_status() local
888 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_flush() local
927 ck_usart_reg_t *addr = (ck_usart_reg_t *)(usart_priv->base); csi_usart_set_interrupt() local
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H A Ddw_timer.c57 static void timer_deactive_control(dw_timer_reg_t *addr) in timer_deactive_control() argument
60 addr->TxControl &= ~DW_TIMER_TXCONTROL_ENABLE; in timer_deactive_control()
62 addr->TxControl |= DW_TIMER_TXCONTROL_INTMASK; in timer_deactive_control()
70 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); in dw_timer_irqhandler() local
72 addr->TxEOI; in dw_timer_irqhandler()
132 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); in csi_timer_initialize() local
139 timer_deactive_control(addr); in csi_timer_initialize()
163 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); in csi_timer_uninitialize() local
165 timer_deactive_control(addr); in csi_timer_uninitialize()
206 dw_timer_reg_t *addr in csi_timer_config() local
265 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_start() local
293 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_stop() local
323 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_resume() local
343 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_get_current_value() local
363 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_get_status() local
388 dw_timer_reg_t *addr = (dw_timer_reg_t *)(timer_priv->base); csi_timer_get_load_value() local
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/mali/common/
H A Dmali_osk_bitops.h23 MALI_STATIC_INLINE void _mali_internal_clear_bit(u32 bit, u32 *addr) in _mali_internal_clear_bit() argument
26 MALI_DEBUG_ASSERT(NULL != addr); in _mali_internal_clear_bit()
28 (*addr) &= ~(1 << bit); in _mali_internal_clear_bit()
31 MALI_STATIC_INLINE void _mali_internal_set_bit(u32 bit, u32 *addr)
34 MALI_DEBUG_ASSERT(NULL != addr);
36 (*addr) |= (1 << bit);
89 * @param addr starting point for counting.
91 MALI_STATIC_INLINE void _mali_osk_clear_nonatomic_bit(u32 nr, u32 *addr)
93 addr += nr >> 5; /* find the correct word */
96 _mali_internal_clear_bit(nr, addr);
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/common/
H A Dmali_osk_bitops.h26 MALI_STATIC_INLINE void _mali_internal_clear_bit(u32 bit, u32 *addr) in _mali_internal_clear_bit() argument
29 MALI_DEBUG_ASSERT(addr != NULL); in _mali_internal_clear_bit()
31 (*addr) &= ~(1 << bit); in _mali_internal_clear_bit()
34 MALI_STATIC_INLINE void _mali_internal_set_bit(u32 bit, u32 *addr)
37 MALI_DEBUG_ASSERT(addr != NULL);
39 (*addr) |= (1 << bit);
91 * @param addr starting point for counting.
93 MALI_STATIC_INLINE void _mali_osk_clear_nonatomic_bit(u32 nr, u32 *addr)
95 addr += nr >> UINT32_BITS_NONATOMICB_BIT; /* find the correct word */
98 _mali_internal_clear_bit(nr, addr);
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/device/soc/hisilicon/hi3751v350/sdk_linux/source/common/drv/mmz/
H A Ddrv_tzsmmu.c34 * input no-secure mem info(smmu addr or phys addr,indicated by iommu),
35 * and return secure address( sec smmu addr or phys addr)
53 mem_addr.addr = base_addr; in secmem_alloc()
70 * input sec mem info (sec smmu addr or phys addr, indicated by iommu),
71 * and output non-sec info (smmu addr or phys addr)
76 u32 addr; in secmem_free() local
181 unsigned int addr; secmem_unmap_from_secsmmu() local
247 HI_U32 addr = MMB_ADDR_INVALID; sec_mem_get() local
271 HI_U32 addr = MMB_ADDR_INVALID; sec_mem_put() local
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H A Ddrv_tee_smmu_agent.c69 mem_addr.addr = new_mmb(smmu_ctrl->name, smmu_ctrl->size, 0x1000, "iommu"); in smmu_agent_mem_alloc()
70 smmu_ctrl->normal_smmu = mem_addr.addr; in smmu_agent_mem_alloc()
74 mem_addr.addr = new_mmb(smmu_ctrl->name, smmu_ctrl->size, 0x1000, NULL); in smmu_agent_mem_alloc()
75 smmu_ctrl->phys_addr = mem_addr.addr; in smmu_agent_mem_alloc()
79 if (mem_addr.addr == MMB_ADDR_INVALID) { in smmu_agent_mem_alloc()
85 mem_info.table = get_meminfo(mem_addr.addr, mem_addr.iommu, (unsigned int *)&size, (unsigned int *)&mem_addr.addr); in smmu_agent_mem_alloc()
96 delete_mmb(mem_addr.addr, mem_addr.iommu); in smmu_agent_mem_alloc()
100 set_sec_mmb_flag(mem_addr.addr, mem_addr.iommu); in smmu_agent_mem_alloc()
101 sec_mmb_get(mem_addr.addr, mem_add in smmu_agent_mem_alloc()
108 mmb_addr_t addr = {0}; smmu_agent_mem_free() local
159 mmb_addr_t addr = {0}; smmu_agent_put_meminfo() local
[all...]
H A Ddrv_mmz_intf.c63 void delete_mmb(mmb_addr_t addr, unsigned int iommu) in delete_mmb() argument
67 mmb = hil_mmb_getby_phys((HI_U32)addr, iommu); in delete_mmb()
77 void *remap_mmb(mmb_addr_t addr, unsigned int iommu) in remap_mmb() argument
83 mmb = hil_mmb_getby_phys((HI_U32)addr, iommu); in remap_mmb()
88 offset = addr - mmb->iommu_addr; in remap_mmb()
90 offset = addr - mmb->phys_addr; in remap_mmb()
100 void *remap_mmb_cached(mmb_addr_t addr, unsigned int iommu) in remap_mmb_cached() argument
106 mmb = hil_mmb_getby_phys((HI_U32)addr, iommu); in remap_mmb_cached()
111 offset = addr - mmb->iommu_addr; in remap_mmb_cached()
113 offset = addr in remap_mmb_cached()
170 cma_mapto_smmu(mmb_addr_t addr, int iommu) cma_mapto_smmu() argument
175 cma_unmapfrom_smmu(mmb_addr_t addr, int iommu) cma_unmapfrom_smmu() argument
206 get_meminfo(u32 addr, u32 iommu, u32 *size, u32 *base) get_meminfo() argument
297 mmb_buf_get(HI_U32 addr, HI_U32 iommu) mmb_buf_get() argument
302 mmb_buf_put(HI_U32 addr, HI_U32 iommu) mmb_buf_put() argument
307 mmb_buf_ref_query(HI_U32 addr, HI_U32 iommu, HI_U32 *ref) mmb_buf_ref_query() argument
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/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/include/
H A Dhi_types_base.h463 #define hi_reg_write(addr, val) (*(volatile unsigned int *)(uintptr_t)(addr) = (val))
464 #define hi_reg_read(addr, val) ((val) = *(volatile unsigned int *)(uintptr_t)(addr))
465 #define hi_reg_write32(addr, val) (*(volatile unsigned int *)(uintptr_t)(addr) = (val))
466 #define hi_reg_read32(addr, val) ((val) = *(volatile unsigned int *)(uintptr_t)(addr))
467 #define hi_reg_read_val32(addr) (*(volatile unsigned int*)(uintptr_t)(addr))
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/device/soc/hisilicon/hi3861v100/sdk_liteos/include/
H A Dhi_types_base.h462 #define hi_reg_write(addr, val) (*(volatile unsigned int *)(uintptr_t)(addr) = (val))
463 #define hi_reg_read(addr, val) ((val) = *(volatile unsigned int *)(uintptr_t)(addr))
464 #define hi_reg_write32(addr, val) (*(volatile unsigned int *)(uintptr_t)(addr) = (val))
465 #define hi_reg_read32(addr, val) ((val) = *(volatile unsigned int *)(uintptr_t)(addr))
466 #define hi_reg_read_val32(addr) (*(volatile unsigned int*)(uintptr_t)(addr))
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/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/arch/
H A Dlos_atomic.h117 * <li>The pointer addr must not be NULL.</li>
118 * <li>The value which addr point to must not be INT_MAX to avoid integer overflow after adding 1.</li>
121 * @param addr [IN] The addSelf variable pointer.
128 static inline VOID LOS_AtomicInc(volatile INT32 *addr) in LOS_AtomicInc() argument
132 (*addr)++; in LOS_AtomicInc()
144 * <li>The pointer addr must not be NULL.</li>
148 * @param addr [IN] The addSelf variable pointer.
155 static inline INT32 LOS_AtomicIncRet(volatile INT32 *addr) in LOS_AtomicIncRet() argument
160 tmp = *addr; in LOS_AtomicIncRet()
162 *addr in LOS_AtomicIncRet()
186 LOS_AtomicDec(volatile INT32 *addr) LOS_AtomicDec() argument
213 LOS_AtomicDecRet(volatile INT32 *addr) LOS_AtomicDecRet() argument
243 LOS_AtomicXchg32bits(volatile INT32 *addr, INT32 value) LOS_AtomicXchg32bits() argument
273 LOS_AtomicCmpXchg32bits(volatile INT32 *addr, INT32 newVal, INT32 oldVal) LOS_AtomicCmpXchg32bits() argument
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/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/include/
H A Dhi_boot_rom.h33 #define hi_reg_write(addr, val) (*(volatile hi_u32*)(uintptr_t)(addr) = (val))
39 #define hi_reg_read(addr, val) ((val) = *(volatile hi_u32*)(uintptr_t)(addr))
45 #define hi_reg_write16(addr, val) (*(volatile hi_u16*)(uintptr_t)(addr) = (val))
51 #define hi_reg_read16(addr, val) ((val) = *(volatile hi_u16*)(uintptr_t)(addr))
57 #define hi_reg_read_val32(addr) (*(volatile hi_u32*)(uintptr_t)(addr))
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/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/
H A Dbcmsdh.c319 * @param addr Address to read from.
324 bcmsdh_cfg_read(void *sdh, uint fnc_num, uint32 addr, int *err) in bcmsdh_cfg_read() argument
343 status = sdioh_cfg_read(bcmsdh->sdioh, fnc_num, addr, (uint8 *)&data); in bcmsdh_cfg_read()
350 BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, uint8data = 0x%x\n", __FUNCTION__, in bcmsdh_cfg_read()
351 fnc_num, addr, data)); in bcmsdh_cfg_read()
357 bcmsdh_cfg_write(void *sdh, uint fnc_num, uint32 addr, uint8 data, int *err) in bcmsdh_cfg_write() argument
375 status = sdioh_cfg_write(bcmsdh->sdioh, fnc_num, addr, (uint8 *)&data); in bcmsdh_cfg_write()
382 BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, uint8data = 0x%x\n", __FUNCTION__, in bcmsdh_cfg_write()
383 fnc_num, addr, data)); in bcmsdh_cfg_write()
387 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, uint32 addr, in argument
411 bcmsdh_cfg_write_word(void *sdh, uint fnc_num, uint32 addr, uint32 data, int *err) bcmsdh_cfg_write_word() argument
519 bcmsdh_reg_read(void *sdh, uintptr addr, uint size) bcmsdh_reg_read() argument
570 bcmsdh_reg_write(void *sdh, uintptr addr, uint size, uint32 data) bcmsdh_reg_write() argument
611 bcmsdh_recv_buf(void *sdh, uint32 addr, uint fn, uint flags, uint8 *buf, uint nbytes, void *pkt, bcmsdh_cmplt_fn_t complete_fn, void *handle) bcmsdh_recv_buf() argument
649 bcmsdh_send_buf(void *sdh, uint32 addr, uint fn, uint flags, uint8 *buf, uint nbytes, void *pkt, bcmsdh_cmplt_fn_t complete_fn, void *handle) bcmsdh_send_buf() argument
687 bcmsdh_rwdata(void *sdh, uint rw, uint32 addr, uint8 *buf, uint nbytes) bcmsdh_rwdata() argument
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_model_dummy.c1086 u8 midgard_model_write_reg(void *h, u32 addr, u32 value) argument
1090 if ((addr >= JOB_CONTROL_REG(JOB_SLOT0)) &&
1091 (addr < (JOB_CONTROL_REG(JOB_SLOT15) + 0x80))) {
1092 int slot_idx = (addr >> 7) & 0xf;
1095 if (addr == JOB_SLOT_REG(slot_idx, JS_HEAD_NEXT_LO)) {
1100 if (addr == JOB_SLOT_REG(slot_idx, JS_HEAD_NEXT_HI)) {
1105 if (addr == JOB_SLOT_REG(slot_idx, JS_COMMAND_NEXT) &&
1121 if (addr == JOB_SLOT_REG(slot_idx, JS_COMMAND_NEXT) && value ==
1125 if ((addr == JOB_SLOT_REG(slot_idx, JS_COMMAND)) &&
1143 } else if (addr
1441 midgard_model_read_reg(void *h, u32 addr, u32 * const value) global() argument
[all...]
/test/xts/hats/kernel/syscalls/mem/mlock2/
H A DMlock2ApiTest.cpp74 void *addr = mmap(nullptr, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in HWTEST_F() local
75 EXPECT_NE(addr, MAP_FAILED); in HWTEST_F()
77 ret = mlock2(addr, size, MLOCK_ONFAULT); in HWTEST_F()
79 EXPECT_NE(munmap(addr, size), -1); in HWTEST_F()
95 void *addr = mmap(nullptr, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in HWTEST_F() local
96 EXPECT_NE(addr, MAP_FAILED); in HWTEST_F()
99 ret = mlock2(addr, size, 0); in HWTEST_F()
101 EXPECT_NE(munmap(addr, size), -1); in HWTEST_F()
117 void *addr = mmap(nullptr, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); in HWTEST_F() local
118 EXPECT_NE(addr, MAP_FAILE in HWTEST_F()
[all...]
/test/xts/hats/kernel/syscalls/mem/msync/
H A DMsyncApiTest.cpp80 void *addr = mmap(nullptr, SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); in HWTEST_F() local
81 EXPECT_NE(addr, MAP_FAILED); in HWTEST_F()
83 char *data = (char *) addr; in HWTEST_F()
88 int ret = msync(addr, SIZE, MS_INVALIDATE); in HWTEST_F()
92 ret = strcmp((char *)addr, expectedData); in HWTEST_F()
100 munmap(addr, SIZE); in HWTEST_F()
120 void *addr = mmap(nullptr, SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); in HWTEST_F() local
121 EXPECT_NE(addr, MAP_FAILED); in HWTEST_F()
123 char *data = (char *) addr; in HWTEST_F()
128 int ret = msync(addr, SIZ in HWTEST_F()
158 void *addr = mmap(nullptr, SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); HWTEST_F() local
[all...]
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/include/
H A Dhi_boot_rom.h33 #define hi_reg_write(addr, val) (*(volatile hi_u32*)(uintptr_t)(addr) = (val))
39 #define hi_reg_read(addr, val) ((val) = *(volatile hi_u32*)(uintptr_t)(addr))
45 #define hi_reg_write16(addr, val) (*(volatile hi_u16*)(uintptr_t)(addr) = (val))
51 #define hi_reg_read16(addr, val) ((val) = *(volatile hi_u16*)(uintptr_t)(addr))
57 #define hi_reg_read_val32(addr) (*(volatile hi_u32*)(uintptr_t)(addr))
[all...]
/device/board/hisilicon/hispark_taurus/camera/pipeline_core/src/
H A Dipp_algo_example.c51 printf("in buffer addr = %p, width = %u, height = %u, stride = %u, size = %u, id = %d\n", inBuffer[i]->addr, in Process()
58 if (outBuffer != NULL && outBuffer->addr != NULL) { in Process()
59 printf("out buffer addr = %p, size = %u, id = %d\n", outBuffer->addr, outBuffer->size, outBuffer->id); in Process()
65 if (inBuffer[0] == NULL || outBuffer == NULL || inBuffer[0]->addr == NULL || outBuffer->addr == NULL) { in Process()
68 char *in = (char*)(inBuffer[0]->addr); in Process()
69 char *out = (char*)(outBuffer->addr); in Process()
77 if (inBuffer[0] == NULL || inBuffer[1] == NULL || inBuffer[0]->addr in Process()
[all...]
/device/board/hihope/dayu210/camera/vdi_impl/v4l2/pipeline_core/src/ipp_algo_example/
H A Dipp_algo_example.c50 printf("in buffer addr = %p, width = %u, height = %u, stride = %u, size = %u, id = %d\n", inBuffer[i]->addr, in Process()
57 if (outBuffer != NULL && outBuffer->addr != NULL) { in Process()
58 printf("out buffer addr = %p, size = %u, id = %d\n", outBuffer->addr, outBuffer->size, outBuffer->id); in Process()
64 if (inBuffer[0] == NULL || outBuffer == NULL || inBuffer[0]->addr == NULL || outBuffer->addr == NULL) { in Process()
67 char *in = (char*)(inBuffer[0]->addr); in Process()
68 char *out = (char*)(outBuffer->addr); in Process()
76 if (inBuffer[0] == NULL || inBuffer[1] == NULL || inBuffer[0]->addr in Process()
[all...]

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