/third_party/vixl/test/aarch32/traces/ |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-adc-a32.h | 161 0x14, 0xbe, 0xaa, 0x00 // adc eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xae, 0x60 // adc vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xa8, 0x00 // adc eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xa4, 0x70 // adc vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xa4, 0xb0 // adc lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xa4, 0xa0 // adc ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xa6, 0x40 // adc mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xa6, 0x40 // adc mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xa9, 0x80 // adc hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-adcs-a32.h | 161 0x14, 0xbe, 0xba, 0x00 // adcs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xbe, 0x60 // adcs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xb8, 0x00 // adcs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xb4, 0x70 // adcs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xb4, 0xb0 // adcs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xb4, 0xa0 // adcs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xb6, 0x40 // adcs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xb6, 0x40 // adcs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xb9, 0x80 // adcs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-add-a32.h | 161 0x14, 0xbe, 0x8a, 0x00 // add eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x8e, 0x60 // add vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x88, 0x00 // add eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x84, 0x70 // add vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x84, 0xb0 // add lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x84, 0xa0 // add ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x86, 0x40 // add mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x86, 0x40 // add mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x89, 0x80 // add hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-adds-a32.h | 161 0x14, 0xbe, 0x9a, 0x00 // adds eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x9e, 0x60 // adds vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x98, 0x00 // adds eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x94, 0x70 // adds vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x94, 0xb0 // adds lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x94, 0xa0 // adds ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x96, 0x40 // adds mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x96, 0x40 // adds mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x99, 0x80 // adds hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-and-a32.h | 161 0x14, 0xbe, 0x0a, 0x00 // and_ eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x0e, 0x60 // and_ vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x08, 0x00 // and_ eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x04, 0x70 // and_ vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x04, 0xb0 // and_ lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x04, 0xa0 // and_ ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x06, 0x40 // and_ mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x06, 0x40 // and_ mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x09, 0x80 // and_ hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-bic-a32.h | 161 0x14, 0xbe, 0xca, 0x01 // bic eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xce, 0x61 // bic vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xc8, 0x01 // bic eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xc4, 0x71 // bic vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xc4, 0xb1 // bic lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xc4, 0xa1 // bic ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xc6, 0x41 // bic mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xc6, 0x41 // bic mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xc9, 0x81 // bic hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-bics-a32.h | 161 0x14, 0xbe, 0xda, 0x01 // bics eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xde, 0x61 // bics vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xd8, 0x01 // bics eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xd4, 0x71 // bics vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xd4, 0xb1 // bics lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xd4, 0xa1 // bics ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xd6, 0x41 // bics mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xd6, 0x41 // bics mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xd9, 0x81 // bics hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-eor-a32.h | 161 0x14, 0xbe, 0x2a, 0x00 // eor eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x2e, 0x60 // eor vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x28, 0x00 // eor eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x24, 0x70 // eor vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x24, 0xb0 // eor lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x24, 0xa0 // eor ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x26, 0x40 // eor mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x26, 0x40 // eor mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x29, 0x80 // eor hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-eors-a32.h | 161 0x14, 0xbe, 0x3a, 0x00 // eors eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x3e, 0x60 // eors vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x38, 0x00 // eors eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x34, 0x70 // eors vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x34, 0xb0 // eors lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x34, 0xa0 // eors ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x36, 0x40 // eors mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x36, 0x40 // eors mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x39, 0x80 // eors hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-orr-a32.h | 161 0x14, 0xbe, 0x8a, 0x01 // orr eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x8e, 0x61 // orr vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x88, 0x01 // orr eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x84, 0x71 // orr vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x84, 0xb1 // orr lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x84, 0xa1 // orr ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x86, 0x41 // orr mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x86, 0x41 // orr mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x89, 0x81 // orr hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-orrs-a32.h | 161 0x14, 0xbe, 0x9a, 0x01 // orrs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x9e, 0x61 // orrs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x98, 0x01 // orrs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x94, 0x71 // orrs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x94, 0xb1 // orrs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x94, 0xa1 // orrs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x96, 0x41 // orrs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x96, 0x41 // orrs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x99, 0x81 // orrs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-rsb-a32.h | 161 0x14, 0xbe, 0x6a, 0x00 // rsb eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x6e, 0x60 // rsb vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x68, 0x00 // rsb eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x64, 0x70 // rsb vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x64, 0xb0 // rsb lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x64, 0xa0 // rsb ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x66, 0x40 // rsb mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x66, 0x40 // rsb mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x69, 0x80 // rsb hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-rsbs-a32.h | 161 0x14, 0xbe, 0x7a, 0x00 // rsbs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x7e, 0x60 // rsbs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x78, 0x00 // rsbs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x74, 0x70 // rsbs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x74, 0xb0 // rsbs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x74, 0xa0 // rsbs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x76, 0x40 // rsbs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x76, 0x40 // rsbs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x79, 0x80 // rsbs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-rsc-a32.h | 161 0x14, 0xbe, 0xea, 0x00 // rsc eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xee, 0x60 // rsc vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xe8, 0x00 // rsc eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xe4, 0x70 // rsc vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xe4, 0xb0 // rsc lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xe4, 0xa0 // rsc ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xe6, 0x40 // rsc mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xe6, 0x40 // rsc mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xe9, 0x80 // rsc hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-rscs-a32.h | 161 0x14, 0xbe, 0xfa, 0x00 // rscs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xfe, 0x60 // rscs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xf8, 0x00 // rscs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xf4, 0x70 // rscs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xf4, 0xb0 // rscs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xf4, 0xa0 // rscs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xf6, 0x40 // rscs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xf6, 0x40 // rscs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xf9, 0x80 // rscs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-sbc-a32.h | 161 0x14, 0xbe, 0xca, 0x00 // sbc eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xce, 0x60 // sbc vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xc8, 0x00 // sbc eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xc4, 0x70 // sbc vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xc4, 0xb0 // sbc lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xc4, 0xa0 // sbc ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xc6, 0x40 // sbc mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xc6, 0x40 // sbc mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xc9, 0x80 // sbc hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-sbcs-a32.h | 161 0x14, 0xbe, 0xda, 0x00 // sbcs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0xde, 0x60 // sbcs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0xd8, 0x00 // sbcs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0xd4, 0x70 // sbcs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0xd4, 0xb0 // sbcs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0xd4, 0xa0 // sbcs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0xd6, 0x40 // sbcs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0xd6, 0x40 // sbcs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0xd9, 0x80 // sbcs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-sub-a32.h | 161 0x14, 0xbe, 0x4a, 0x00 // sub eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x4e, 0x60 // sub vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x48, 0x00 // sub eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x44, 0x70 // sub vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x44, 0xb0 // sub lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x44, 0xa0 // sub ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x46, 0x40 // sub mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x46, 0x40 // sub mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x49, 0x80 // sub hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
H A D | assembler-cond-rd-rn-operand-rm-shift-rs-subs-a32.h | 161 0x14, 0xbe, 0x5a, 0x00 // subs eq r11 r10 r4 LSL r14 467 0x14, 0x76, 0x5e, 0x60 // subs vs r7 r14 r4 LSL r6 512 0x14, 0xa6, 0x58, 0x00 // subs eq r10 r8 r4 LSL r6 677 0x14, 0xba, 0x54, 0x70 // subs vc r11 r4 r4 LSL r10 836 0x79, 0x14, 0x54, 0xb0 // subs lt r1 r4 r9 ROR r4 860 0x14, 0xbe, 0x54, 0xa0 // subs ge r11 r4 r4 LSL r14 1361 0x14, 0x29, 0x56, 0x40 // subs mi r2 r6 r4 LSL r9 1433 0x14, 0x91, 0x56, 0x40 // subs mi r9 r6 r4 LSL r1 1451 0x14, 0x46, 0x59, 0x80 // subs hi r4 r9 r4 LSL r6 1835 0x14, [all...] |
/third_party/elfio/tests/ |
H A D | ELFIOTest.cpp | 730 char descr[6] = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 }; in TEST() 783 char descr[6] = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 }; in TEST() 836 char descr[6] = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 }; in TEST() 889 char descr[6] = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16 }; in TEST()
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/third_party/ffmpeg/libswresample/x86/ |
H A D | resample.asm | 73 %define update_context_stackd [rsp-0x14] 150 %define filter_allocd dword [rsp+0x14] 294 %define phase_mask_stackd [rsp-0x14] 393 %define filter_alloc_x4q dword [rsp+0x14]
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/third_party/ffmpeg/libavutil/ |
H A D | twofish.c | 45 0x14, 0x4f, 0xa2, 0xf9, 0x11, 0x4a, 0xa7, 0xfc, 0x1e, 0x45, 0xa8, 0xf3, 0x1b, 0x40, 0xad, 0xf6, 72 0xfc, 0x13, 0x4b, 0xa4, 0xfb, 0x14, 0x4c, 0xa3, 0xf2, 0x1d, 0x45, 0xaa, 0xf5, 0x1a, 0x42, 0xad, 94 0x28, 0x14, 0x3f, 0x29, 0x88, 0x3c, 0x4c, 0x02, 0xb8, 0xda, 0xb0, 0x17, 0x55, 0x1f, 0x8a, 0x7d, 104 0xa0, 0x84, 0x07, 0x14, 0xb5, 0x90, 0x2c, 0xa3, 0xb2, 0x73, 0x4c, 0x54, 0x92, 0x74, 0x36, 0x51,
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/third_party/backends/backend/ |
H A D | hp5400_internal.c | 1094 0x50, 0x72, 0x6F, 0x63, 0x65, 0x73, 0x73, 0x69, 0x6E, 0x67, 0x14, 0x00, 1100 0x14, 0x00, 0x50, 0x6F, 0x77, 0x65, 0x72, 0x53, 0x61, 0x76, 0x65, 0x20, 1106 0x63, 0x61, 0x6E, 0x6E, 0x69, 0x6E, 0x67, 0x14, 0x00, 0x41, 0x44, 0x46, 1347 char x1 = 0x14, x2 = 0x24; in InitScan2()
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/third_party/mbedtls/library/ |
H A D | camellia.c | 747 0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4 } 830 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 835 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 842 { 0xD0, 0x9D, 0xC2, 0x9A, 0x82, 0x14, 0x61, 0x9A,
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/third_party/json/tests/src/ |
H A D | unit-bson.cpp | 173 0x14, 0x00, 0x00, 0x00, // size (little endian) 268 0x14, 0x00, 0x00, 0x00, // size (little endian) 341 0x14, 0x00, 0x00, 0x00, // size (little endian) 579 std::vector<std::uint8_t> input = {0x31, 0x00, 0x00, 0x00, 0x04, 'B', 'S', 'O', 'N', 0x00, 0x26, 0x00, 0x00, 0x00, 0x02, 0x30, 0x00, 0x08, 0x00, 0x00, 0x00, 'a', 'w', 'e', 's', 'o', 'm', 'e', 0x00, 0x01, 0x31, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x14, 0x40, 0x10, 0x32, 0x00, 0xc2, 0x07, 0x00, 0x00, 0x00, 0x00};
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