Home
last modified time | relevance | path

Searched refs:x1000 (Results 301 - 325 of 5537) sorted by relevance

1...<<11121314151617181920>>...222

/third_party/ffmpeg/libavformat/
H A Dvag.c55 avio_seek(s->pb, 0x1000, SEEK_SET); in vag_read_header()
57 st->codecpar->block_align = 0x1000 * st->codecpar->ch_layout.nb_channels; in vag_read_header()
/third_party/musl/porting/liteos_m/kernel/include/sys/
H A Dtimex.h40 #define ADJ_MICRO 0x1000
73 #define STA_CLOCKERR 0x1000
/third_party/musl/porting/liteos_m_iccarm/kernel/include/sys/
H A Dtimex.h40 #define ADJ_MICRO 0x1000
73 #define STA_CLOCKERR 0x1000
/third_party/musl/porting/uniproton/kernel/include/sys/
H A Dtimex.h40 #define ADJ_MICRO 0x1000
73 #define STA_CLOCKERR 0x1000
/third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/
H A Dfd5_context.c101 fd_bo_new(screen->dev, 0x1000, 0, "vsc_size");
104 fd_bo_new(screen->dev, 0x1000, 0, "blit");
/third_party/musl/include/sys/
H A Dtimex.h40 #define ADJ_MICRO 0x1000
73 #define STA_CLOCKERR 0x1000
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hifb/drv/hi3516cv500/
H A Dhifb_def.h31 #define VO_VHD_BASE_ADDR 0x1000 /* V0's base addr */
38 #define VHD_REGS_LEN 0x1000 /* len of V0's regs */
39 #define VSD_REGS_LEN 0x1000
41 #define GFX2_REGS_LEN 0x1000
43 #define DHD_REGS_LEN 0x1000
181 HAL_INPUTFMT_YCBCR_PACKAGE_444 = 0x1000,
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/vo/vo_dev/arch/hi3516cv500/include/
H A Dvou_def.h30 #define VO_VHD_BASE_ADDR 0x1000 /* V0's base addr */
37 #define VHD_REGS_LEN 0x1000 /* len of V0's regs */
38 #define VSD_REGS_LEN 0x1000
40 #define GFX2_REGS_LEN 0x1000
42 #define DHD_REGS_LEN 0x1000
196 HAL_INPUTFMT_YCBCR_PACKAGE_444 = 0x1000,
/kernel/linux/linux-5.10/drivers/video/fbdev/
H A Dcg14.c373 .size = 0x1000
378 .size = 0x1000
383 .size = 0x1000
388 .size = 0x1000
393 .size = 0x1000
408 .size = 0x1000
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dwm9090.h74 #define WM9090_SPKOUTL_ENA 0x1000 /* SPKOUTL_ENA */
75 #define WM9090_SPKOUTL_ENA_MASK 0x1000 /* SPKOUTL_ENA */
539 #define WM9090_DCS_TRIG_SINGLE_0 0x1000 /* DCS_TRIG_SINGLE_0 */
540 #define WM9090_DCS_TRIG_SINGLE_0_MASK 0x1000 /* DCS_TRIG_SINGLE_0 */
675 #define WM9090_AGC_PWR_AVG 0x1000 /* AGC_PWR_AVG */
676 #define WM9090_AGC_PWR_AVG_MASK 0x1000 /* AGC_PWR_AVG */
H A Dsgtl5000.h147 #define SGTL5000_DAC_LRSWAP 0x1000
176 #define SGTL5000_VOL_BUSY_DAC_LEFT 0x1000
331 #define SGTL5000_STARTUP_POWERUP 0x1000
390 #define SGTL5000_MONO_DAC 0x1000
/kernel/linux/linux-6.6/drivers/video/fbdev/
H A Dcg14.c374 .size = 0x1000
379 .size = 0x1000
384 .size = 0x1000
389 .size = 0x1000
394 .size = 0x1000
409 .size = 0x1000
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dwm9090.h74 #define WM9090_SPKOUTL_ENA 0x1000 /* SPKOUTL_ENA */
75 #define WM9090_SPKOUTL_ENA_MASK 0x1000 /* SPKOUTL_ENA */
539 #define WM9090_DCS_TRIG_SINGLE_0 0x1000 /* DCS_TRIG_SINGLE_0 */
540 #define WM9090_DCS_TRIG_SINGLE_0_MASK 0x1000 /* DCS_TRIG_SINGLE_0 */
675 #define WM9090_AGC_PWR_AVG 0x1000 /* AGC_PWR_AVG */
676 #define WM9090_AGC_PWR_AVG_MASK 0x1000 /* AGC_PWR_AVG */
/kernel/linux/linux-5.10/include/linux/mfd/madera/
H A Dregisters.h1518 #define MADERA_FLL1_PHASEDET_ENA_MASK 0x1000
1672 #define MADERA_MICB1D_ENA 0x1000
1673 #define MADERA_MICB1D_ENA_MASK 0x1000
1690 #define MADERA_MICB2D_ENA 0x1000
1691 #define MADERA_MICB2D_ENA_MASK 0x1000
2369 #define MADERA_OUT1_MONO 0x1000
2370 #define MADERA_OUT1_MONO_MASK 0x1000
2605 #define MADERA_SPK1L_MUTE 0x1000
2606 #define MADERA_SPK1L_MUTE_MASK 0x1000
2628 #define MADERA_SPK2L_MUTE 0x1000
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h155 #define HW_DEBUG__HW_12_DEBUG_MASK 0x1000
287 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000
325 #define BIF_FEATURES_CONTROL_MISC__BIF_RB_SET_OVERFLOW_EN_MASK 0x1000
573 #define BACO_CNTL__PWRGOOD_DVO_MASK 0x1000
737 #define GARLIC_FLUSH_CNTL__VCE_RB_WPTR_MASK 0x1000
845 #define GPU_GARLIC_FLUSH_REQ__SDMA2_MASK 0x1000
873 #define GPU_GARLIC_FLUSH_DONE__SDMA2_MASK 0x1000
1073 #define STATUS__RECEIVED_TARGET_ABORT_MASK 0x1000
1293 #define LINK_STATUS__SLOT_CLOCK_CFG_MASK 0x1000
1541 #define PCIE_UNCORR_ERR_STATUS__PSN_ERR_STATUS_MASK 0x1000
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h155 #define HW_DEBUG__HW_12_DEBUG_MASK 0x1000
287 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000
325 #define BIF_FEATURES_CONTROL_MISC__BIF_RB_SET_OVERFLOW_EN_MASK 0x1000
573 #define BACO_CNTL__PWRGOOD_DVO_MASK 0x1000
737 #define GARLIC_FLUSH_CNTL__VCE_RB_WPTR_MASK 0x1000
845 #define GPU_GARLIC_FLUSH_REQ__SDMA2_MASK 0x1000
873 #define GPU_GARLIC_FLUSH_DONE__SDMA2_MASK 0x1000
1073 #define STATUS__RECEIVED_TARGET_ABORT_MASK 0x1000
1293 #define LINK_STATUS__SLOT_CLOCK_CFG_MASK 0x1000
1541 #define PCIE_UNCORR_ERR_STATUS__PSN_ERR_STATUS_MASK 0x1000
[all...]
/third_party/ffmpeg/libavcodec/
H A Dtscc2data.h117 0x01A0, 0x0036, 0x00D1, 0x0FD3, 0x0025, 0x0130, 0x1000, 0x0051, 0x0FF6,
134 0x0050, 0x0FB0, 0x1000, 0x0031, 0x01D0, 0x0018, 0x00A1, 0x0FB6, 0x00C6,
146 0x1000, 0x00B0, 0x0FE5, 0x0091, 0x0E90, 0x0241, 0x0231, 0x0FF5, 0x0015,
177 0x0025, 0x0026, 0x0EE0, 0x0FA5, 0x01C1, 0x0F70, 0x0FD0, 0x0030, 0x1000,
191 0x0ED0, 0x0F13, 0x0181, 0x0F76, 0x0F23, 0x0045, 0x1000, 0x0023, 0x00C0,
202 0x0FE0, 0x0020, 0x1000, 0x0081, 0x0018, 0x0075, 0x0043, 0x00C3, 0x0121,
213 0x1000, 0x00C0, 0x0042, 0x0120, 0x00A0, 0x0F80, 0x0FD1, 0x0F43, 0x0F63,
240 0x0F20, 0x0050, 0x1000, 0x0FF6, 0x0FB0, 0x0FA1, 0x0101, 0x0F53, 0x00E0,
250 0x0FB1, 0x1000, 0x0020, 0x0FE0, 0x0040, 0x0FC0, 0x0FE1, 0x0FF3, 0x0013,
264 0x00E1, 0x00D1, 0x0FE3, 0x1000,
[all...]
/kernel/linux/linux-5.10/drivers/usb/gadget/udc/
H A Dm66592-udc.h22 #define M66592_RCKE 0x1000 /* b12: Register clock enable */
101 #define M66592_DREQE 0x1000 /* b12: DREQ output enable */
132 #define M66592_DVSE 0x1000 /* b12: Device state transition interrupt */
148 #define M66592_DTCHE 0x1000 /* b12: Detach sense interrupt */
198 #define M66592_DVST 0x1000 /* b12: Device state transition */
227 #define M66592_DTCH 0x1000 /* b12: Detach sense interrupt */
390 #define M66592_IFIS 0x1000 /* b12: ISO in-buffer flush mode */
/kernel/linux/linux-6.6/drivers/usb/gadget/udc/
H A Dm66592-udc.h22 #define M66592_RCKE 0x1000 /* b12: Register clock enable */
101 #define M66592_DREQE 0x1000 /* b12: DREQ output enable */
132 #define M66592_DVSE 0x1000 /* b12: Device state transition interrupt */
148 #define M66592_DTCHE 0x1000 /* b12: Detach sense interrupt */
198 #define M66592_DVST 0x1000 /* b12: Device state transition */
227 #define M66592_DTCH 0x1000 /* b12: Detach sense interrupt */
390 #define M66592_IFIS 0x1000 /* b12: ISO in-buffer flush mode */
/kernel/linux/linux-5.10/drivers/amba/
H A Dtegra-ahb.c211 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
219 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
227 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
235 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
/kernel/linux/linux-5.10/drivers/net/can/softing/
H A Dsofting_cs.c70 .dpram_size = 0x1000,
106 .dpram_size = 0x1000,
130 .dpram_size = 0x1000,
192 if (resource_size(pres) < 0x1000) in softingcs_probe_config()
/kernel/linux/linux-5.10/sound/pci/hda/
H A Dca0132_regs.h54 #define AXRAM_AXRAM_CHANNEL_COUNT 0x1000
62 #define AYRAM_AYRAM_CHANNEL_COUNT 0x1000
264 #define DSPDMAC_CHNLSTATUS_AOO_MASK 0x1000
296 #define DSPDMAC_CHNLPROP_FFS_MASK 0x1000
/kernel/linux/linux-5.10/sound/soc/intel/atom/sst/
H A Dsst_acpi.c90 .ssp0_size = 0x1000,
100 .mbox_size = 0x1000,
112 .ssp0_size = 0x1000,
122 .mbox_size = 0x1000,
/kernel/linux/linux-6.6/drivers/net/can/softing/
H A Dsofting_cs.c70 .dpram_size = 0x1000,
106 .dpram_size = 0x1000,
130 .dpram_size = 0x1000,
192 if (resource_size(pres) < 0x1000) in softingcs_probe_config()
/kernel/linux/linux-6.6/drivers/amba/
H A Dtegra-ahb.c211 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
219 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
227 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()
235 INACTIVITY_TIMEOUT(0x1000); in tegra_ahb_gizmo_init()

Completed in 122 milliseconds

1...<<11121314151617181920>>...222