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/kernel/linux/linux-5.10/drivers/crypto/qat/qat_c3xxx/
H A Dadf_c3xxx_hw_data.h23 #define ADF_C3XXX_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)
24 #define ADF_C3XXX_AE_MISC_CONTROL(i) (i * 0x1000 + 0x20960)
/kernel/linux/linux-5.10/arch/m68k/include/asm/
H A Dcontregs.h42 #define AC_M_RPR 0x1000 /* hv Root Pointer Reg */
43 #define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */
/kernel/linux/linux-5.10/arch/powerpc/sysdev/
H A Ddart.h16 #define DART_TAGS_U3 0x1000
22 #define DART_TAGS_U4 0x1000
/kernel/linux/linux-5.10/drivers/crypto/qat/qat_c62x/
H A Dadf_c62x_hw_data.h24 #define ADF_C62X_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)
25 #define ADF_C62X_AE_MISC_CONTROL(i) (i * 0x1000 + 0x20960)
/kernel/linux/linux-5.10/drivers/net/dsa/mv88e6xxx/
H A Dsmi.h18 #define MV88E6XXX_SMI_CMD_MODE_MASK 0x1000
20 #define MV88E6XXX_SMI_CMD_MODE_22 0x1000
/kernel/linux/linux-6.6/arch/m68k/include/asm/
H A Dcontregs.h42 #define AC_M_RPR 0x1000 /* hv Root Pointer Reg */
43 #define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */
/kernel/linux/linux-6.6/arch/powerpc/sysdev/
H A Ddart.h16 #define DART_TAGS_U3 0x1000
22 #define DART_TAGS_U4 0x1000
/kernel/linux/linux-6.6/drivers/net/dsa/mv88e6xxx/
H A Dsmi.h18 #define MV88E6XXX_SMI_CMD_MODE_MASK 0x1000
20 #define MV88E6XXX_SMI_CMD_MODE_22 0x1000
/kernel/linux/linux-5.10/tools/virtio/ringtest/
H A Dvirtio_ring_0_9.c70 ret = posix_memalign(&p, 0x1000, vring_size(ring_size, 0x1000)); in alloc_ring()
75 memset(p, 0, vring_size(ring_size, 0x1000)); in alloc_ring()
76 vring_init(&ring, ring_size, p, 0x1000); in alloc_ring()
/kernel/linux/linux-5.10/include/linux/
H A Dwm97xx.h39 #define WM97XX_ADCSEL_X 0x1000 /* x coord measurement */
71 #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
86 #define WM9705_PDEN 0x1000 /* measure only when pen is down */
107 #define WM9713_45W 0x1000 /* set for 5 wire panel */
/kernel/linux/linux-6.6/include/linux/
H A Dwm97xx.h39 #define WM97XX_ADCSEL_X 0x1000 /* x coord measurement */
71 #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
86 #define WM9705_PDEN 0x1000 /* measure only when pen is down */
107 #define WM9713_45W 0x1000 /* set for 5 wire panel */
/kernel/linux/linux-6.6/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen2_hw_data.h25 #define ADF_RING_BUNDLE_SIZE 0x1000
109 #define ADF_ARB_REG_SLOT 0x1000
140 #define ADF_GEN2_AE_CTX_ENABLES(i) ((i) * 0x1000 + 0x20818)
141 #define ADF_GEN2_AE_MISC_CONTROL(i) ((i) * 0x1000 + 0x20960)
/kernel/linux/linux-6.6/tools/virtio/ringtest/
H A Dvirtio_ring_0_9.c70 ret = posix_memalign(&p, 0x1000, vring_size(ring_size, 0x1000)); in alloc_ring()
75 memset(p, 0, vring_size(ring_size, 0x1000)); in alloc_ring()
76 vring_init(&ring, ring_size, p, 0x1000); in alloc_ring()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h119 #define HW_DEBUG__HW_12_DEBUG_MASK 0x1000
249 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000
285 #define SMBDAT_PAD_CNTL__SMBDAT_PAD_CNTL_EN_MASK 0x1000
309 #define SMBCLK_PAD_CNTL__SMBCLK_PAD_CNTL_EN_MASK 0x1000
547 #define BACO_CNTL__PWRGOOD_DVO_MASK 0x1000
653 #define GARLIC_FLUSH_CNTL__VCE_RB_WPTR_MASK 0x1000
877 #define STATUS__RECEIVED_TARGET_ABORT_MASK 0x1000
1097 #define LINK_STATUS__SLOT_CLOCK_CFG_MASK 0x1000
1305 #define PCIE_UNCORR_ERR_STATUS__PSN_ERR_STATUS_MASK 0x1000
1337 #define PCIE_UNCORR_ERR_MASK__PSN_ERR_MASK_MASK 0x1000
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_sh_mask.h119 #define HW_DEBUG__HW_12_DEBUG_MASK 0x1000
249 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_CNTL_EN_MASK 0x1000
285 #define SMBDAT_PAD_CNTL__SMBDAT_PAD_CNTL_EN_MASK 0x1000
309 #define SMBCLK_PAD_CNTL__SMBCLK_PAD_CNTL_EN_MASK 0x1000
547 #define BACO_CNTL__PWRGOOD_DVO_MASK 0x1000
653 #define GARLIC_FLUSH_CNTL__VCE_RB_WPTR_MASK 0x1000
877 #define STATUS__RECEIVED_TARGET_ABORT_MASK 0x1000
1097 #define LINK_STATUS__SLOT_CLOCK_CFG_MASK 0x1000
1305 #define PCIE_UNCORR_ERR_STATUS__PSN_ERR_STATUS_MASK 0x1000
1337 #define PCIE_UNCORR_ERR_MASK__PSN_ERR_MASK_MASK 0x1000
[all...]
/kernel/linux/linux-5.10/arch/powerpc/platforms/maple/
H A Dpci.c380 if (offset >= 0x1000) in u4_pcie_read_config()
411 if (offset >= 0x1000) in u4_pcie_write_config()
454 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u3_agp()
455 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u3_agp()
466 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u4_pcie()
467 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u4_pcie()
481 hose->cfg_addr = ioremap(0xf8070000, 0x1000); in setup_u3_ht()
/kernel/linux/linux-6.6/arch/powerpc/platforms/maple/
H A Dpci.c380 if (offset >= 0x1000) in u4_pcie_read_config()
411 if (offset >= 0x1000) in u4_pcie_write_config()
454 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u3_agp()
455 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u3_agp()
466 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000); in setup_u4_pcie()
467 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000); in setup_u4_pcie()
481 hose->cfg_addr = ioremap(0xf8070000, 0x1000); in setup_u3_ht()
/kernel/linux/linux-5.10/include/linux/mfd/wm8350/
H A Dpmic.h73 #define WM8350_CS1_HIB_MODE 0x1000
74 #define WM8350_CS1_HIB_MODE_MASK 0x1000
98 #define WM8350_CS2_HIB_MODE 0x1000
188 #define WM8350_DC2_HIB_MODE 0x1000
189 #define WM8350_DC2_HIB_MODE_MASK 0x1000
306 #define WM8350_DC5_HIB_MODE 0x1000
307 #define WM8350_DC5_HIB_MODE_MASK 0x1000
/kernel/linux/linux-6.6/include/linux/mfd/wm8350/
H A Dpmic.h73 #define WM8350_CS1_HIB_MODE 0x1000
74 #define WM8350_CS1_HIB_MODE_MASK 0x1000
98 #define WM8350_CS2_HIB_MODE 0x1000
188 #define WM8350_DC2_HIB_MODE 0x1000
189 #define WM8350_DC2_HIB_MODE_MASK 0x1000
306 #define WM8350_DC5_HIB_MODE 0x1000
307 #define WM8350_DC5_HIB_MODE_MASK 0x1000
/kernel/linux/linux-6.6/drivers/net/ipa/reg/
H A Dipa_reg-v5.0.c482 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x0000c008 + 0x1000 * GSI_EE_AP);
485 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000c00c + 0x1000 * GSI_EE_AP);
488 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x0000c010 + 0x1000 * GSI_EE_AP);
495 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000c01c + 0x1000 * GSI_EE_AP);
500 0x0000c030 + 0x1000 * GSI_EE_AP, 0x0004);
505 0x0000c050 + 0x1000 * GSI_EE_AP, 0x0004);
510 0x0000c070 + 0x1000 * GSI_EE_AP, 0x0004);
H A Dipa_reg-v4.5.c458 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
461 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
464 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
471 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP);
475 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004);
479 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004);
483 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004);
H A Dipa_reg-v4.9.c436 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00004008 + 0x1000 * GSI_EE_AP);
439 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000400c + 0x1000 * GSI_EE_AP);
442 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00004010 + 0x1000 * GSI_EE_AP);
449 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000401c + 0x1000 * GSI_EE_AP);
453 0x00004030 + 0x1000 * GSI_EE_AP, 0x0004);
457 0x00004034 + 0x1000 * GSI_EE_AP, 0x0004);
461 0x00004038 + 0x1000 * GSI_EE_AP, 0x0004);
H A Dipa_reg-v4.7.c431 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
434 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
437 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
444 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP);
448 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004);
452 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004);
456 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004);
H A Dipa_reg-v4.11.c439 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00004008 + 0x1000 * GSI_EE_AP);
442 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000400c + 0x1000 * GSI_EE_AP);
445 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00004010 + 0x1000 * GSI_EE_AP);
452 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000401c + 0x1000 * GSI_EE_AP);
456 0x00004030 + 0x1000 * GSI_EE_AP, 0x0004);
460 0x00004034 + 0x1000 * GSI_EE_AP, 0x0004);
464 0x00004038 + 0x1000 * GSI_EE_AP, 0x0004);
H A Dipa_reg-v3.1.c372 REG(IPA_IRQ_STTS, ipa_irq_stts, 0x00003008 + 0x1000 * GSI_EE_AP);
375 REG(IPA_IRQ_EN, ipa_irq_en, 0x0000300c + 0x1000 * GSI_EE_AP);
378 REG(IPA_IRQ_CLR, ipa_irq_clr, 0x00003010 + 0x1000 * GSI_EE_AP);
385 REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP);
389 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004);
393 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004);
397 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004);

Completed in 85 milliseconds

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