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/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dwm8510.c84 { 50, 0x0001 },
90 { 56, 0x0001 },
393 clk |= 0x0001; in wm8510_set_dai_fmt()
/kernel/linux/linux-6.6/drivers/scsi/mpi3mr/mpi/
H A Dmpi30_transport.h208 #define MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK (0x0001)
333 #define MPI3_EEDPFLAGS_EEDP_OP_CHECK (0x0001)
406 #define MPI3_IOCSTATUS_INVALID_FUNCTION (0x0001)
/third_party/node/deps/openssl/openssl/include/openssl/
H A Dengine.h45 # define ENGINE_METHOD_RSA (unsigned int)0x0001
64 # define ENGINE_TABLE_FLAG_NOINIT (unsigned int)0x0001
68 /* #define ENGINE_FLAGS_MALLOCED 0x0001 */
111 # define ENGINE_CMD_FLAG_NUMERIC (unsigned int)0x0001
/third_party/skia/third_party/externals/swiftshader/include/EGL/
H A Degl.h101 #define EGL_PBUFFER_BIT 0x0001
189 #define EGL_OPENGL_ES_BIT 0x0001
265 #define EGL_SYNC_FLUSH_COMMANDS_BIT 0x0001
/third_party/openssl/include/openssl/
H A Dengine.h45 # define ENGINE_METHOD_RSA (unsigned int)0x0001
64 # define ENGINE_TABLE_FLAG_NOINIT (unsigned int)0x0001
68 /* #define ENGINE_FLAGS_MALLOCED 0x0001 */
111 # define ENGINE_CMD_FLAG_NUMERIC (unsigned int)0x0001
/third_party/openssl/ohos_lite/include/openssl/
H A Dengine.h39 # define ENGINE_METHOD_RSA (unsigned int)0x0001
58 # define ENGINE_TABLE_FLAG_NOINIT (unsigned int)0x0001
62 /* #define ENGINE_FLAGS_MALLOCED 0x0001 */
105 # define ENGINE_CMD_FLAG_NUMERIC (unsigned int)0x0001
/third_party/vixl/test/aarch64/
H A Dtest-simulator-inputs-aarch64.h484 0x0001, \
587 0x0001, \
883 0x0001, \
/third_party/skia/third_party/externals/egl-registry/api/EGL/
H A Degl.h101 #define EGL_PBUFFER_BIT 0x0001
189 #define EGL_OPENGL_ES_BIT 0x0001
265 #define EGL_SYNC_FLUSH_COMMANDS_BIT 0x0001
/vendor/hihope/dayu210/bluetooth/include/
H A Duipc_msg.h33 #define UIPC_VERSION_MAJOR 0x0001
340 #define AUDIO_CODEC_SBC_ENC 0x0001
605 #define AUDIO_ROUTE_OUT_BTA2DP 0x0001
/vendor/hihope/rk3568/bluetooth/include/
H A Duipc_msg.h33 #define UIPC_VERSION_MAJOR 0x0001
340 #define AUDIO_CODEC_SBC_ENC 0x0001
605 #define AUDIO_ROUTE_OUT_BTA2DP 0x0001
/third_party/vixl/test/aarch64/traces/
H A Dsim-uqrshl-h-trace-aarch64.h236 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
237 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
248 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
249 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
259 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
260 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
271 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
272 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
497 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
521 0x0001,
[all...]
H A Dsim-sqrdmlah-h-h-h-trace-aarch64.h473 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
480 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
487 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
494 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
665 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
671 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
678 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
686 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
863 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
870 0x0001,
[all...]
/kernel/linux/linux-5.10/include/uapi/linux/
H A Dvideodev2.h793 #define V4L2_FMT_FLAG_COMPRESSED 0x0001
892 #define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */
1162 #define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
1171 #define V4L2_FBUF_FLAG_PRIMARY 0x0001
1207 #define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */
1825 #define V4L2_CTRL_FLAG_DISABLED 0x0001
1876 #define V4L2_TUNER_CAP_LOW 0x0001
1892 #define V4L2_TUNER_SUB_MONO 0x0001
1901 #define V4L2_TUNER_MODE_STEREO 0x0001
2131 #define V4L2_SLICED_TELETEXT_B (0x0001)
[all...]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/i2c/
H A Dmt9m114.h64 #define MISENSOR_HFLIP_MASK 0x0001
554 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
591 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
629 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
666 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
705 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
745 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
831 {MISENSOR_16BIT, 0x31E0, 0x0001},
844 {MISENSOR_16BIT, 0x0982, 0x0001},
1012 {MISENSOR_16BIT, 0x0982, 0x0001},
[all...]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/i2c/
H A Dmt9m114.h64 #define MISENSOR_HFLIP_MASK 0x0001
539 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
576 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
614 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
651 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
690 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
730 {MISENSOR_16BIT, 0xC80C, 0x0001}, /* cam_sensor_cfg_row_speed = 1 */
818 {MISENSOR_16BIT, 0x31E0, 0x0001},
831 {MISENSOR_16BIT, 0x0982, 0x0001},
999 {MISENSOR_16BIT, 0x0982, 0x0001},
[all...]
/kernel/linux/linux-6.6/include/uapi/linux/
H A Dvideodev2.h861 #define V4L2_FMT_FLAG_COMPRESSED 0x0001
960 #define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */
1240 #define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
1251 #define V4L2_FBUF_FLAG_PRIMARY 0x0001
1287 #define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */
1961 #define V4L2_CTRL_FLAG_DISABLED 0x0001
2013 #define V4L2_TUNER_CAP_LOW 0x0001
2029 #define V4L2_TUNER_SUB_MONO 0x0001
2038 #define V4L2_TUNER_MODE_STEREO 0x0001
2268 #define V4L2_SLICED_TELETEXT_B (0x0001)
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/renesas/rcar-vin/
H A Drcar-csi2.c230 { .msps = 2900, .rx2 = 0xb5, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
231 { .msps = 3000, .rx2 = 0xbb, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
232 { .msps = 3100, .rx2 = 0xc1, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
233 { .msps = 3200, .rx2 = 0xc7, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
234 { .msps = 3300, .rx2 = 0xce, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
235 { .msps = 3400, .rx2 = 0xd4, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
236 { .msps = 3500, .rx2 = 0xda, .trio0 = 0x084a, .trio1 = 0x0001, .trio2 = 0x04, .lane27 = 0x1c00, .lane29 = 0x0ad4 },
1009 rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE0_CTRL_2_REG(2), 0x0001); in rcsi2_c_phy_setting_v4h()
1011 rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE2_CTRL_2_REG(2), 0x0001); in rcsi2_c_phy_setting_v4h()
1012 rcsi2_write16(priv, V4H_CORE_DIG_IOCTRL_RW_AFE_LANE3_CTRL_2_REG(2), 0x0001); in rcsi2_c_phy_setting_v4h()
[all...]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
H A Dvideodev2.h429 #define V4L2_FMT_FLAG_COMPRESSED 0x0001
502 #define V4L2_TC_FLAG_DROPFRAME 0x0001
614 #define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
622 #define V4L2_FBUF_FLAG_PRIMARY 0x0001
650 #define V4L2_MODE_HIGHQUALITY 0x0001
954 #define V4L2_CTRL_FLAG_DISABLED 0x0001
992 #define V4L2_TUNER_CAP_LOW 0x0001
1006 #define V4L2_TUNER_SUB_MONO 0x0001
1013 #define V4L2_TUNER_MODE_STEREO 0x0001
1159 #define V4L2_SLICED_TELETEXT_B (0x0001)
[all...]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
H A Dvideodev2.h429 #define V4L2_FMT_FLAG_COMPRESSED 0x0001
502 #define V4L2_TC_FLAG_DROPFRAME 0x0001
614 #define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001
622 #define V4L2_FBUF_FLAG_PRIMARY 0x0001
650 #define V4L2_MODE_HIGHQUALITY 0x0001
954 #define V4L2_CTRL_FLAG_DISABLED 0x0001
992 #define V4L2_TUNER_CAP_LOW 0x0001
1006 #define V4L2_TUNER_SUB_MONO 0x0001
1013 #define V4L2_TUNER_MODE_STEREO 0x0001
1159 #define V4L2_SLICED_TELETEXT_B (0x0001)
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h124 #define regVGA_MEM_READ_PAGE_ADDR 0x0001
185 #define regAZCONTROLLER1_CORB_CONTROL 0x0001
187 #define regAZCONTROLLER1_CORB_STATUS 0x0001
189 #define regAZCONTROLLER1_CORB_SIZE 0x0001
453 #define regDC_PERFMON0_PERFCOUNTER_CNTL2 0x0001
1349 #define regVGA_SEQUENCER_RESET_CONTROL 0x0001
6455 #define regMPCC0_MPCC_BOT_SEL 0x0001
[all...]
H A Ddcn_3_0_1_offset.h30 #define mmVGA_MEM_READ_PAGE_ADDR 0x0001
92 #define mmCORB_CONTROL 0x0001
94 #define mmCORB_STATUS 0x0001
96 #define mmCORB_SIZE 0x0001
150 #define mmVGA_SEQUENCER_RESET_CONTROL 0x0001
374 #define mmDC_PERFMON0_PERFCOUNTER_CNTL2 0x0001
10246 #define mmMPCC0_MPCC_BOT_SEL 0x0001
[all...]
H A Ddcn_3_2_0_offset.h938 #define regVGA_MEM_READ_PAGE_ADDR 0x0001
942 #define regVGA_SEQUENCER_RESET_CONTROL 0x0001
4757 #define regMPCC0_MPCC_BOT_SEL 0x0001
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2132 #define mmMM_DATA 0x0001
2685 //#define mmBIF_BX_PF_MM_DATA 0x0001
2693 #define mmBIF_BX_DEV0_EPF0_VF0_MM_DATA 0x0001
2753 #define mmBIF_BX_DEV0_EPF0_VF1_MM_DATA 0x0001
2809 #define mmBIF_BX_DEV0_EPF0_VF2_MM_DATA 0x0001
2865 #define mmBIF_BX_DEV0_EPF0_VF3_MM_DATA 0x0001
2921 #define mmBIF_BX_DEV0_EPF0_VF4_MM_DATA 0x0001
2977 #define mmBIF_BX_DEV0_EPF0_VF5_MM_DATA 0x0001
3033 #define mmBIF_BX_DEV0_EPF0_VF6_MM_DATA 0x0001
3089 #define mmBIF_BX_DEV0_EPF0_VF7_MM_DATA 0x0001
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2132 #define mmMM_DATA 0x0001
2685 //#define mmBIF_BX_PF_MM_DATA 0x0001
2693 #define mmBIF_BX_DEV0_EPF0_VF0_MM_DATA 0x0001
2753 #define mmBIF_BX_DEV0_EPF0_VF1_MM_DATA 0x0001
2809 #define mmBIF_BX_DEV0_EPF0_VF2_MM_DATA 0x0001
2865 #define mmBIF_BX_DEV0_EPF0_VF3_MM_DATA 0x0001
2921 #define mmBIF_BX_DEV0_EPF0_VF4_MM_DATA 0x0001
2977 #define mmBIF_BX_DEV0_EPF0_VF5_MM_DATA 0x0001
3033 #define mmBIF_BX_DEV0_EPF0_VF6_MM_DATA 0x0001
3089 #define mmBIF_BX_DEV0_EPF0_VF7_MM_DATA 0x0001
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h78 #define mmVGA_MEM_READ_PAGE_ADDR 0x0001
140 #define mmCORB_CONTROL 0x0001
142 #define mmCORB_STATUS 0x0001
144 #define mmCORB_SIZE 0x0001
381 //#define mmVGA_VGA_MEM_READ_PAGE_ADDR 0x0001
387 //#define mmVGA_VGA_MEM_READ_PAGE_ADDR 0x0001
390 #define mmVGA_SEQUENCER_RESET_CONTROL 0x0001
682 #define mmDC_PERFMON0_PERFCOUNTER_CNTL2 0x0001
[all...]

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