/kernel/linux/linux-6.6/sound/soc/codecs/ |
H A D | rt722-sdca-sdw.h | 88 { 0x6100055, 0x0000 }, 91 CH_L), 0x0000 }, 93 CH_R), 0x0000 }, 95 CH_L), 0x0000 }, 97 CH_R), 0x0000 }, 99 CH_L), 0x0000 }, 101 CH_R), 0x0000 }, 103 CH_01), 0x0000 }, 105 CH_02), 0x0000 }, 107 CH_03), 0x0000 }, [all...] |
H A D | rt5682.c | 70 {0x0005, 0x0000}, 71 {0x0006, 0x0000}, 73 {0x000b, 0x0000}, 75 {0x0011, 0x0000}, 83 {0x001f, 0x0000}, 91 {0x0030, 0x0000}, 94 {0x0049, 0x0000}, 95 {0x0061, 0x0000}, 96 {0x0062, 0x0000}, 98 {0x0064, 0x0000}, [all...] |
H A D | rt1015.c | 39 { 0x0000, 0x0000 }, 44 { 0x000e, 0x0000 }, 45 { 0x0010, 0x0000 }, 46 { 0x0012, 0x0000 }, 47 { 0x0014, 0x0000 }, 48 { 0x0016, 0x0000 }, 49 { 0x0018, 0x0000 }, 52 { 0x0076, 0x0000 }, 53 { 0x0078, 0x0000 }, [all...] |
H A D | wm8510.c | 35 { 1, 0x0000 }, 36 { 2, 0x0000 }, 37 { 3, 0x0000 }, 39 { 5, 0x0000 }, 41 { 7, 0x0000 }, 42 { 8, 0x0000 }, 43 { 9, 0x0000 }, 44 { 10, 0x0000 }, 46 { 12, 0x0000 }, 47 { 13, 0x0000 }, [all...] |
/kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
H A D | cm2_7xx.h | 29 #define DRA7XX_CM_CORE_OCP_SOCKET_INST 0x0000 42 #define DRA7XX_CM_CORE_COREAON_COREAON_CDOFFS 0x0000 43 #define DRA7XX_CM_CORE_CORE_L3MAIN1_CDOFFS 0x0000 50 #define DRA7XX_CM_CORE_IVA_IVA_CDOFFS 0x0000 51 #define DRA7XX_CM_CORE_CAM_CAM_CDOFFS 0x0000 52 #define DRA7XX_CM_CORE_DSS_DSS_CDOFFS 0x0000 53 #define DRA7XX_CM_CORE_GPU_GPU_CDOFFS 0x0000 54 #define DRA7XX_CM_CORE_L3INIT_L3INIT_CDOFFS 0x0000 57 #define DRA7XX_CM_CORE_CUSTEFUSE_CUSTEFUSE_CDOFFS 0x0000 58 #define DRA7XX_CM_CORE_L4PER_L4PER_CDOFFS 0x0000 [all...] |
H A D | cm2_44xx.h | 32 #define OMAP4430_CM2_OCP_SOCKET_INST 0x0000 45 #define OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS 0x0000 46 #define OMAP4430_CM2_CORE_L3_1_CDOFFS 0x0000 54 #define OMAP4430_CM2_IVAHD_IVAHD_CDOFFS 0x0000 55 #define OMAP4430_CM2_CAM_CAM_CDOFFS 0x0000 56 #define OMAP4430_CM2_DSS_DSS_CDOFFS 0x0000 57 #define OMAP4430_CM2_GFX_GFX_CDOFFS 0x0000 58 #define OMAP4430_CM2_L3INIT_L3INIT_CDOFFS 0x0000 59 #define OMAP4430_CM2_L4PER_L4PER_CDOFFS 0x0000 61 #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 [all...] |
H A D | prm33xx.h | 43 #define AM33XX_PM_MPU_PWRSTCTRL_OFFSET 0x0000 44 #define AM33XX_PM_MPU_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000) 49 #define AM33XX_PRM_RSTCTRL_OFFSET 0x0000 50 #define AM33XX_PRM_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000) 53 #define AM33XX_PM_RTC_PWRSTCTRL_OFFSET 0x0000 54 #define AM33XX_PM_RTC_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000) 59 #define AM33XX_PM_GFX_PWRSTCTRL_OFFSET 0x0000 60 #define AM33XX_PM_GFX_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000) 65 #define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 66 #define AM33XX_PM_CEFUSE_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000) [all...] |
H A D | cm33xx.h | 23 #define AM33XX_CM_PER_MOD 0x0000 33 #define AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET 0x0000 34 #define AM33XX_CM_PER_L4LS_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_PER_MOD, 0x0000) 57 #define AM33XX_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 58 #define AM33XX_CM_WKUP_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_WKUP_MOD, 0x0000) 68 #define AM33XX_CM_MPU_CLKSTCTRL_OFFSET 0x0000 69 #define AM33XX_CM_MPU_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_MPU_MOD, 0x0000) 79 #define AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET 0x0000 80 #define AM33XX_CM_GFX_L3_CLKSTCTRL AM33XX_CM_REGADDR(AM33XX_CM_GFX_MOD, 0x0000) 85 #define AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET 0x0000 [all...] |
H A D | cm2_54xx.h | 28 #define OMAP54XX_CM_CORE_OCP_SOCKET_INST 0x0000 40 #define OMAP54XX_CM_CORE_COREAON_COREAON_CDOFFS 0x0000 41 #define OMAP54XX_CM_CORE_CORE_L3MAIN1_CDOFFS 0x0000 52 #define OMAP54XX_CM_CORE_IVA_IVA_CDOFFS 0x0000 53 #define OMAP54XX_CM_CORE_CAM_CAM_CDOFFS 0x0000 54 #define OMAP54XX_CM_CORE_DSS_DSS_CDOFFS 0x0000 55 #define OMAP54XX_CM_CORE_GPU_GPU_CDOFFS 0x0000 56 #define OMAP54XX_CM_CORE_L3INIT_L3INIT_CDOFFS 0x0000 57 #define OMAP54XX_CM_CORE_CUSTEFUSE_CUSTEFUSE_CDOFFS 0x0000
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H A D | prcm_mpu54xx.h | 30 #define OMAP54XX_PRCM_MPU_OCP_SOCKET_INST 0x0000 38 #define OMAP54XX_PRCM_MPU_CM_C0_CPU0_CDOFFS 0x0000 39 #define OMAP54XX_PRCM_MPU_CM_C1_CPU1_CDOFFS 0x0000 52 #define OMAP54XX_REVISION_PRCM_MPU_OFFSET 0x0000 55 #define OMAP54XX_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 61 #define OMAP54XX_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 68 #define OMAP54XX_CM_CPU0_CLKSTCTRL_OFFSET 0x0000 73 #define OMAP54XX_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 80 #define OMAP54XX_CM_CPU1_CLKSTCTRL_OFFSET 0x0000
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/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
H A D | pinctrl-mt8186.c | 825 PIN_FIELD_BASE(0, 0, 6, 0x0000, 0x10, 27, 3), 826 PIN_FIELD_BASE(1, 1, 6, 0x0000, 0x10, 27, 3), 827 PIN_FIELD_BASE(2, 2, 6, 0x0000, 0x10, 27, 3), 828 PIN_FIELD_BASE(3, 3, 6, 0x0000, 0x10, 27, 3), 831 PIN_FIELD_BASE(6, 6, 4, 0x0000, 0x10, 9, 3), 832 PIN_FIELD_BASE(7, 7, 4, 0x0000, 0x10, 9, 3), 833 PIN_FIELD_BASE(8, 8, 4, 0x0000, 0x10, 9, 3), 834 PIN_FIELD_BASE(9, 9, 4, 0x0000, 0x10, 12, 3), 835 PIN_FIELD_BASE(10, 10, 4, 0x0000, 0x10, 0, 3), 836 PIN_FIELD_BASE(11, 11, 4, 0x0000, [all...] |
/kernel/linux/linux-5.10/sound/soc/codecs/ |
H A D | rt5682.c | 64 {0x0005, 0x0000}, 65 {0x0006, 0x0000}, 67 {0x000b, 0x0000}, 69 {0x0011, 0x0000}, 77 {0x001f, 0x0000}, 85 {0x0030, 0x0000}, 88 {0x0049, 0x0000}, 89 {0x0061, 0x0000}, 90 {0x0062, 0x0000}, 92 {0x0064, 0x0000}, [all...] |
H A D | wm8510.c | 35 { 1, 0x0000 }, 36 { 2, 0x0000 }, 37 { 3, 0x0000 }, 39 { 5, 0x0000 }, 41 { 7, 0x0000 }, 42 { 8, 0x0000 }, 43 { 9, 0x0000 }, 44 { 10, 0x0000 }, 46 { 12, 0x0000 }, 47 { 13, 0x0000 }, [all...] |
H A D | rt1015.c | 40 { 0x0000, 0x0000 }, 45 { 0x000e, 0x0000 }, 46 { 0x0010, 0x0000 }, 47 { 0x0012, 0x0000 }, 48 { 0x0014, 0x0000 }, 49 { 0x0016, 0x0000 }, 50 { 0x0018, 0x0000 }, 53 { 0x0076, 0x0000 }, 54 { 0x0078, 0x0000 }, [all...] |
/kernel/linux/linux-5.10/drivers/staging/fbtft/ |
H A D | fb_upd161704.c | 62 write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ in init_display() 67 write_reg(par, 0x001D, 0x0000); /* Regulator current setting */ in init_display() 74 write_reg(par, 0x0008, 0x0000); /* Minimum X address */ in init_display() 76 write_reg(par, 0x000a, 0x0000); /* Minimum Y address */ in init_display() 80 write_reg(par, 0x0029, 0x0000); /* [LCDSIZE] X MIN. size set */ in init_display() 81 write_reg(par, 0x002A, 0x0000); /* [LCDSIZE] Y MIN. size set */ in init_display() 89 write_reg(par, 0x0033, 0x0000); in init_display() 92 write_reg(par, 0x0037, 0x0000); in init_display() 99 write_reg(par, 0x0004, 0x0000); in init_display() 102 write_reg(par, 0x0005, 0x0000); /*Windo in init_display() [all...] |
/kernel/linux/linux-6.6/drivers/staging/fbtft/ |
H A D | fb_upd161704.c | 62 write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */ in init_display() 67 write_reg(par, 0x001D, 0x0000); /* Regulator current setting */ in init_display() 74 write_reg(par, 0x0008, 0x0000); /* Minimum X address */ in init_display() 76 write_reg(par, 0x000a, 0x0000); /* Minimum Y address */ in init_display() 80 write_reg(par, 0x0029, 0x0000); /* [LCDSIZE] X MIN. size set */ in init_display() 81 write_reg(par, 0x002A, 0x0000); /* [LCDSIZE] Y MIN. size set */ in init_display() 89 write_reg(par, 0x0033, 0x0000); in init_display() 92 write_reg(par, 0x0037, 0x0000); in init_display() 99 write_reg(par, 0x0004, 0x0000); in init_display() 102 write_reg(par, 0x0005, 0x0000); /*Windo in init_display() [all...] |
/third_party/vixl/test/aarch64/traces/ |
H A D | sim-fabs-8h-trace-aarch64.h | 38 0x7f23, 0x7e00, 0x7d23, 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, 39 0x7e00, 0x7d23, 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, 0x0400, 40 0x7d23, 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, 0x0400, 0x37ff, 41 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, 0x0400, 0x37ff, 0x3800, 42 0x0012, 0x03ff, 0x0001, 0x0000, 0x0400, 0x37ff, 0x3800, 0x3801, 43 0x03ff, 0x0001, 0x0000, 0x0400, 0x37ff, 0x3800, 0x3801, 0x3bff, 44 0x0001, 0x0000, 0x0400, 0x37ff, 0x3800, 0x3801, 0x3bff, 0x3c00, 45 0x0000, 0x0400, 0x37ff, 0x3800, 0x3801, 0x3bff, 0x3c00, 0x3c01, 57 0x7f23, 0x7e00, 0x7d23, 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, 58 0x7e00, 0x7d23, 0x7c01, 0x0012, 0x03ff, 0x0001, 0x0000, [all...] |
H A D | sim-scvtf-8h-2opimm-trace-aarch64.h | 38 0xf6c0, 0xf6c0, 0xf680, 0xf640, 0xd800, 0xd400, 0xbc00, 0x0000, 39 0xf2c0, 0xf2c0, 0xf280, 0xf240, 0xd400, 0xd000, 0xb800, 0x0000, 40 0xeec0, 0xeec0, 0xee80, 0xee40, 0xd000, 0xcc00, 0xb400, 0x0000, 41 0xeac0, 0xeac0, 0xea80, 0xea40, 0xcc00, 0xc800, 0xb000, 0x0000, 42 0xe6c0, 0xe6c0, 0xe680, 0xe640, 0xc800, 0xc400, 0xac00, 0x0000, 43 0xe2c0, 0xe2c0, 0xe280, 0xe240, 0xc400, 0xc000, 0xa800, 0x0000, 44 0xdec0, 0xdec0, 0xde80, 0xde40, 0xc000, 0xbc00, 0xa400, 0x0000, 45 0xdac0, 0xdac0, 0xda80, 0xda40, 0xbc00, 0xb800, 0xa000, 0x0000, 46 0xd6c0, 0xd6c0, 0xd680, 0xd640, 0xb800, 0xb400, 0x9c00, 0x0000, 47 0xd2c0, 0xd2c0, 0xd280, 0xd240, 0xb400, 0xb000, 0x9800, 0x0000, [all...] |
H A D | sim-ucvtf-8h-2opimm-trace-aarch64.h | 38 0x78a0, 0x78a0, 0x78c0, 0x78e0, 0x7bfc, 0x7bfe, 0x7c00, 0x0000, 39 0x74a0, 0x74a0, 0x74c0, 0x74e0, 0x77fc, 0x77fe, 0x7800, 0x0000, 40 0x70a0, 0x70a0, 0x70c0, 0x70e0, 0x73fc, 0x73fe, 0x7400, 0x0000, 41 0x6ca0, 0x6ca0, 0x6cc0, 0x6ce0, 0x6ffc, 0x6ffe, 0x7000, 0x0000, 42 0x68a0, 0x68a0, 0x68c0, 0x68e0, 0x6bfc, 0x6bfe, 0x6c00, 0x0000, 43 0x64a0, 0x64a0, 0x64c0, 0x64e0, 0x67fc, 0x67fe, 0x6800, 0x0000, 44 0x60a0, 0x60a0, 0x60c0, 0x60e0, 0x63fc, 0x63fe, 0x6400, 0x0000, 45 0x5ca0, 0x5ca0, 0x5cc0, 0x5ce0, 0x5ffc, 0x5ffe, 0x6000, 0x0000, 46 0x58a0, 0x58a0, 0x58c0, 0x58e0, 0x5bfc, 0x5bfe, 0x5c00, 0x0000, 47 0x54a0, 0x54a0, 0x54c0, 0x54e0, 0x57fc, 0x57fe, 0x5800, 0x0000, [all...] |
H A D | sim-dup-4h-2opimm-trace-aarch64.h | 45 0x0000, 0x0000, 0x0000, 0x0000, 52 0x0000, 0x0000, 0x0000, 0x0000, 59 0x0000, 0x0000, [all...] |
H A D | sim-uminv-h-8h-trace-aarch64.h | 38 0x0000, 39 0x0000, 40 0x0000, 41 0x0000, 42 0x0000, 43 0x0000, 44 0x0000, 45 0x0000,
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/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
H A D | tables_lpphy.c | 30 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 31 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 32 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 33 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 34 { .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, }, 35 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, [all...] |
/kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/ |
H A D | tables_lpphy.c | 30 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 31 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 32 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 33 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */ 34 { .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, }, 35 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, [all...] |
/kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
H A D | prcm_mpu54xx.h | 30 #define OMAP54XX_PRCM_MPU_OCP_SOCKET_INST 0x0000 38 #define OMAP54XX_PRCM_MPU_CM_C0_CPU0_CDOFFS 0x0000 39 #define OMAP54XX_PRCM_MPU_CM_C1_CPU1_CDOFFS 0x0000 52 #define OMAP54XX_REVISION_PRCM_MPU_OFFSET 0x0000 55 #define OMAP54XX_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 61 #define OMAP54XX_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 68 #define OMAP54XX_CM_CPU0_CLKSTCTRL_OFFSET 0x0000 73 #define OMAP54XX_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 80 #define OMAP54XX_CM_CPU1_CLKSTCTRL_OFFSET 0x0000
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/kernel/linux/linux-5.10/drivers/media/usb/gspca/ |
H A D | xirlink_cit.c | 125 {0, 0x0000, 0x010c}, 130 {0, 0x0000, 0x0127}, 132 {1, 0x0000, 0x0116}, 134 {1, 0x0000, 0x0115}, 137 {0, 0x0000, 0x0117}, 138 {0, 0x0000, 0x0112}, 140 {0, 0x0000, 0x0100}, 141 {1, 0x0000, 0x0116}, 144 {0, 0x0000, 0x0123}, 154 {0, 0x0000, [all...] |