| /third_party/python/Lib/test/test_importlib/ |
| H A D | test_main.py | 116 assert version(pkg_name.upper()) == '1.0'
|
| /third_party/python/Lib/test/ |
| H A D | test_type_comments.py | 346 self.assertEqual(arg.type_comment, arg.arg.upper())
|
| /third_party/python/Lib/wsgiref/ |
| H A D | handlers.py | 357 return self.environ['SERVER_PROTOCOL'].upper() != 'HTTP/0.9'
|
| /third_party/skia/infra/bots/recipe_modules/build/ |
| H A D | default.py | 67 '-DSWIFTSHADER_{}=ON'.format(short.upper()),
|
| /third_party/vk-gl-cts/external/vulkancts/scripts/ |
| H A D | gen_framework_sc.py | 143 name = name.upper()
683 extNameUpper = extensionName.upper()
908 prefix += enum.name[i].upper()
2085 nameSplitUp = map(str.upper, nameSplit)
2268 structName = re.sub("[_0-9][a-z]", lambda match: match.group(0).upper(), sType.capitalize()).replace('_', '')
2332 structName = re.sub("[_0-9][a-z]", lambda match: match.group(0).upper(), sType.capitalize()).replace('_', '')
2816 metaCondition = metaCondition + ' || defined(CTS_USES_' + v[1][0].upper() + ')'
2862 metaCondition = metaCondition + ' || defined(CTS_USES_' + v[3][0].upper() + ')'
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| H A D | i740fb.c | 401 u32 yres, lower, vslen, upper, ytotal; in i740fb_decode_var() local
486 upper = var->upper_margin; in i740fb_decode_var()
499 ytotal = yres + lower + vslen + upper; in i740fb_decode_var()
|
| /kernel/linux/linux-6.6/fs/overlayfs/ |
| H A D | inode.c | 118 * (upper fsid is 0). The lowest xinobit is reserved for mapping in ovl_map_dev_ino()
206 * upper files, so we cannot use the lower origin st_ino in ovl_getattr()
216 * upper hardlink is not broken and that a redirected in ovl_getattr()
243 * no origin on upper, we can end up here. in ovl_getattr()
275 * Return the overlay inode nlinks for indexed upper inodes. in ovl_getattr()
276 * Overlay inode nlink counts the union of the upper hardlinks in ovl_getattr()
277 * and non-covered lower hardlinks. It does not include the upper in ovl_getattr()
791 * in upper fileattr (in case they were set by older kernel) in ovl_fileattr_set()
935 * upper fs:
998 * To avoid ino collision with legitimate xino values from upper in ovl_map_ino()
1291 ovl_hash_bylower(struct super_block *sb, struct dentry *upper, struct dentry *lower, bool index) ovl_hash_bylower() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| H A D | i740fb.c | 402 u32 yres, lower, vslen, upper, ytotal; in i740fb_decode_var() local
487 upper = var->upper_margin; in i740fb_decode_var()
500 ytotal = yres + lower + vslen + upper; in i740fb_decode_var()
|
| /kernel/linux/linux-6.6/kernel/bpf/ |
| H A D | devmap.c | 576 /* Get ifindex of each upper device. 'indexes' must be able to hold at
582 struct net_device *upper; in get_upper_ifindexes() local
586 netdev_for_each_upper_dev_rcu(dev, upper, iter) { in get_upper_ifindexes()
587 indexes[n++] = upper->ifindex; in get_upper_ifindexes()
|
| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | midgard_schedule.c | 397 bool upper) in mir_adjust_constant()
409 if (type_size != 16 && upper) in mir_adjust_constant()
412 /* For 16-bit, we need to stay on either upper or lower halves to avoid in mir_adjust_constant()
414 unsigned start = upper ? 8 : 0; in mir_adjust_constant()
496 /* Next, try upper half */ in mir_adjust_constants()
393 mir_adjust_constant(midgard_instruction *ins, unsigned src, unsigned *bundle_constant_mask, unsigned *comp_mapping, uint8_t *bundle_constants, bool upper) mir_adjust_constant() argument
|
| /third_party/skia/third_party/externals/spirv-tools/source/util/ |
| H A D | hex_float.h | 722 const char* upper = "ABCDEF"; in get_nibble_from_character() local
728 } else if ((p = strchr(upper, character))) { in get_nibble_from_character()
729 return static_cast<uint8_t>(p - upper + 0xa); in get_nibble_from_character()
|
| /third_party/skia/third_party/externals/angle2/src/tests/ |
| H A D | capture_replay_tests.py | 813 logger.setLevel(level=args.log.upper())
1120 logging.basicConfig(level=args.log.upper(), filename=args.result_file)
1122 logging.basicConfig(level=args.log.upper())
|
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/util/ |
| H A D | hex_float.h | 722 const char* upper = "ABCDEF"; in get_nibble_from_character() local
728 } else if ((p = strchr(upper, character))) { in get_nibble_from_character()
729 return static_cast<uint8_t>(p - upper + 0xa); in get_nibble_from_character()
|
| /third_party/spirv-tools/source/util/ |
| H A D | hex_float.h | 723 const char* upper = "ABCDEF"; in get_nibble_from_character() local
729 } else if ((p = strchr(upper, character))) { in get_nibble_from_character()
730 return static_cast<uint8_t>(p - upper + 0xa); in get_nibble_from_character()
|
| /third_party/node/deps/v8/src/execution/loong64/ |
| H A D | simulator-loong64.cc | 912 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
921 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2960 set_fpu_register(fd_reg(), kFPUInvalidResult); // Trash upper 32 bits. in DecodeTypeOp10()
3961 set_fpu_register(fd_reg(), kFPUInvalidResult); // Trash upper 32 bits.
5013 float upper = std::ceil(fj); in DecodeTypeOp22() local
5018 if (upper - fj < fj - lower) { in DecodeTypeOp22()
5019 result = upper; in DecodeTypeOp22()
5020 } else if (upper - fj > fj - lower) { in DecodeTypeOp22()
5023 temp_result = upper / 2; in DecodeTypeOp22()
5026 result = upper; in DecodeTypeOp22()
5055 double upper = std::ceil(fj); DecodeTypeOp22() local
[all...] |
| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 817 FPUregisters_[2 * i + 1] = 0; // upper part for MSA ASE in Simulator()
884 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
896 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2703 float upper = std::ceil(fs); in DecodeTypeRegisterSRsType() local
2707 if (upper - fs < fs - lower) { in DecodeTypeRegisterSRsType()
2708 result = upper; in DecodeTypeRegisterSRsType()
2709 } else if (upper - fs > fs - lower) { in DecodeTypeRegisterSRsType()
2712 temp_result = upper / 2; in DecodeTypeRegisterSRsType()
2715 result = upper; in DecodeTypeRegisterSRsType()
2722 result = (fs > 0 ? lower : upper); in DecodeTypeRegisterSRsType()
3078 double upper = std::ceil(fs); DecodeTypeRegisterDRsType() local
[all...] |
| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 874 FPUregisters_[2 * i + 1] = 0; // upper part for MSA ASE in Simulator()
940 // Set ONLY lower 32-bits, leaving upper bits untouched. in set_fpu_register_word()
948 // Set ONLY upper 32-bits, leaving lower bits untouched. in set_fpu_register_hi_word()
2695 double upper = std::ceil(fs); in DecodeTypeRegisterDRsType() local
2699 if (upper - fs < fs - lower) { in DecodeTypeRegisterDRsType()
2700 result = upper; in DecodeTypeRegisterDRsType()
2701 } else if (upper - fs > fs - lower) { in DecodeTypeRegisterDRsType()
2704 temp_result = upper / 2; in DecodeTypeRegisterDRsType()
2707 result = upper; in DecodeTypeRegisterDRsType()
2714 result = (fs > 0 ? lower : upper); in DecodeTypeRegisterDRsType()
3183 float upper = std::ceil(fs); DecodeTypeRegisterSRsType() local
[all...] |
| /kernel/linux/linux-5.10/arch/m68k/fpsp040/ |
| H A D | fpsp.h | 162 .set stag_mask,0xE0 | upper 3 bits are source tag type
183 .set dtag_mask,0xE0 | upper 3 bits are dest type tag
|
| /kernel/linux/linux-5.10/arch/arm64/kvm/vgic/ |
| H A D | vgic-mmio-v3.c | 33 int upper = lower + 8 * len - 1; in update_64bit_reg() local
35 reg &= ~GENMASK_ULL(upper, lower); in update_64bit_reg()
189 /* The upper word is RAZ for us. */ in vgic_mmio_read_irouter()
205 /* The upper word is WI for us since we don't implement Aff3. */ in vgic_mmio_write_irouter()
944 /* bail out if the upper three levels don't match */ in match_mpidr()
972 * This ICC_SGI1R_EL1 register contains the upper three affinity levels of the
|
| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| H A D | book3s_emulate.c | 637 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, in kvmppc_set_bat() argument
640 if (upper) { in kvmppc_set_bat()
|
| /kernel/linux/linux-6.6/arch/arm64/kvm/vgic/ |
| H A D | vgic-mmio-v3.c | 33 int upper = lower + 8 * len - 1; in update_64bit_reg() local
35 reg &= ~GENMASK_ULL(upper, lower); in update_64bit_reg()
203 /* The upper word is RAZ for us. */ in vgic_mmio_read_irouter()
219 /* The upper word is WI for us since we don't implement Aff3. */ in vgic_mmio_write_irouter()
560 * If the guest wrote only to the upper 32bit part of the in vgic_mmio_write_invlpi()
1042 /* bail out if the upper three levels don't match */ in match_mpidr()
1070 * This ICC_SGI1R_EL1 register contains the upper three affinity levels of the
|
| /kernel/linux/linux-6.6/arch/m68k/fpsp040/ |
| H A D | fpsp.h | 162 .set stag_mask,0xE0 | upper 3 bits are source tag type
183 .set dtag_mask,0xE0 | upper 3 bits are dest type tag
|
| /kernel/linux/linux-6.6/arch/powerpc/kvm/ |
| H A D | book3s_emulate.c | 633 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, in kvmppc_set_bat() argument
636 if (upper) { in kvmppc_set_bat()
|
| /kernel/linux/linux-5.10/net/tipc/ |
| H A D | group.c | 367 seq->upper = grp->instance; in tipc_group_self()
684 evt.s.seq.upper = m->instance; in tipc_group_create_event()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramgf100.c | 519 ubase = lcomm + func->upper; in gf100_ram_ctor()
658 .upper = 0x0200000000ULL,
|