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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp233 case AMDGPU::sub1: in getSubOperand64()
344 MachineOperand Hi1(getSubOperand64(I.getOperand(1), HalfRC, AMDGPU::sub1)); in selectG_ADD_SUB()
345 MachineOperand Hi2(getSubOperand64(I.getOperand(2), HalfRC, AMDGPU::sub1)); in selectG_ADD_SUB()
380 .addImm(AMDGPU::sub1); in selectG_ADD_SUB()
1390 .addImm(AMDGPU::sub1);
1477 .addImm(AMDGPU::sub1);
1681 .addReg(SrcReg, 0, AMDGPU::sub1);
1690 .addImm(AMDGPU::sub1);
H A DAMDGPURegisterInfo.cpp31 { AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
H A DSIFrameLowering.cpp217 Register FlatScrInitHi = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub1); in emitFlatScratchInit()
547 Register RsrcHi = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1); in emitEntryFunctionScratchSetup()
642 Register Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1); in emitEntryFunctionScratchSetup()
H A DR600MachineScheduler.cpp262 case R600::sub1: in getAluKind()
H A DAMDGPUISelDAGToDAG.cpp653 SDValue(Hi, 0), CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32)}; in buildSMovImm64()
818 SubReg1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in Select()
1009 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in SelectADD_SUB_I64()
1707 SDValue Sub1 = CurDAG->getTargetConstant(AMDGPU::sub1, DL, MVT::i32); in SelectFlatOffset()
1814 CurDAG->getTargetConstant(AMDGPU::sub1, SL, MVT::i32), in Expand32BitAddress()
H A DSILoadStoreOptimizer.cpp969 unsigned SubRegIdx1 = (CI.EltSize == 4) ? AMDGPU::sub1 : AMDGPU::sub2_sub3; in mergeRead2Pair()
1461 {AMDGPU::sub1, AMDGPU::sub1_sub2, AMDGPU::sub1_sub2_sub3, 0}, in getSubRegIdxs()
1638 .addImm(AMDGPU::sub1); in computeBase()
1680 // REG_SEQUENCE %LO:vgpr_32, %subreg.sub0, %HI:vgpr_32, %subreg.sub1
H A DSIISelLowering.cpp3623 Src0, BoolRC, AMDGPU::sub1, in EmitInstrWithCustomInserter()
3630 Src1, BoolRC, AMDGPU::sub1, in EmitInstrWithCustomInserter()
3647 .addImm(AMDGPU::sub1); in EmitInstrWithCustomInserter()
3780 .addReg(Src0, 0, AMDGPU::sub1) in EmitInstrWithCustomInserter()
3782 .addReg(Src1, 0, AMDGPU::sub1) in EmitInstrWithCustomInserter()
3789 .addImm(AMDGPU::sub1); in EmitInstrWithCustomInserter()
10118 case AMDGPU::sub1: return 1; in SubIdx2Lane()
10276 case AMDGPU::sub0: Idx = AMDGPU::sub1; break; in adjustWritemask()
10277 case AMDGPU::sub1: Idx = AMDGPU::sub2; break; in adjustWritemask()
10533 DAG.getTargetConstant(AMDGPU::sub1, D in wrapAddr64Rsrc()
[all...]
H A DAMDGPURegisterBankInfo.cpp924 .addReg(UnmergePiece, 0, AMDGPU::sub1); in executeInWaterfallLoop()
1456 .addUse(SrcReg, 0, AMDGPU::sub1); in buildVCopy()
1462 .addImm(AMDGPU::sub1); in buildVCopy()
H A DSIFoldOperands.cpp878 assert(UseOp.getSubReg() == AMDGPU::sub1); in foldOperand()
/third_party/icu/icu4c/source/common/
H A Dlocdispnames.cpp495 static const UChar sub1[4] = { 0x007b, 0x0031, 0x007d , 0x0000 } ; /* {1} */ in uloc_getDisplayName() local
561 UChar *p1=u_strstr(separator, sub1); in uloc_getDisplayName()
578 UChar *p1=u_strstr(pattern, sub1); in uloc_getDisplayName()
/third_party/node/deps/icu-small/source/common/
H A Dlocdispnames.cpp495 static const char16_t sub1[4] = { 0x007b, 0x0031, 0x007d , 0x0000 } ; /* {1} */ in uloc_getDisplayName() local
561 char16_t *p1=u_strstr(separator, sub1); in uloc_getDisplayName()
578 char16_t *p1=u_strstr(pattern, sub1); in uloc_getDisplayName()
/third_party/protobuf/php/tests/
H A DGeneratedClassTest.php611 $sub1 = new Sub(); variable
612 $sub1->setA(101);
614 $b = $sub1->getB();
616 $sub1->setB($b);
618 $n->setOptionalMessage($sub1);
/third_party/googletest/googlemock/test/
H A Dgmock-matchers-comparisons_test.cc2217 AmbiguousCastTypes::DerivedSub1 sub1; in TEST() local
2224 as_base_ptr = &sub1; in TEST()
/third_party/ffmpeg/libavcodec/x86/
H A Dvp9lpf_16bpp.asm139 ; src/sub1, sub2, add1, add2, dont_store
H A Dvp9lpf.asm113 %macro FILTER_SUBx2_ADDx2 11 ; %1=dst %2=h/l %3=cache %4=stack_off %5=sub1 %6=sub2 %7=add1
/third_party/skia/third_party/externals/sfntly/java/lib/
H A Dicu4j-4_8_1_1.jarMETA-INF/ META-INF/MANIFEST.MF com/ com/ibm/ com/ibm/icu/ com/ibm/icu/impl/ ...

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