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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A DIceAssemblerX8664.cpp1156 // {add,sub,mul,div}ps are given a Ty parameter for consistency with
1157 // {add,sub,mul,div}ss. In the future, when the PNaCl ABI allows addpd, etc.,
2434 void AssemblerX8664::sub(Type Ty, GPRRegister dst, GPRRegister src) {
2438 void AssemblerX8664::sub(Type Ty, GPRRegister reg, const AsmAddress &address) {
2442 void AssemblerX8664::sub(Type Ty, GPRRegister reg, const Immediate &imm) {
2446 void AssemblerX8664::sub(Type Ty, const AsmAddress &address, GPRRegister reg) {
2450 void AssemblerX8664::sub(Type Ty, const AsmAddress &address,
H A DIceInstX8632.h3324 template <> constexpr const char *InstX86Sub::Base::Opcode = "sub";
3325 template <> constexpr const char *InstX86SubRMW::Base::Opcode = "sub";
3326 template <> constexpr const char *InstX86Subps::Base::Opcode = "sub";
3327 template <> constexpr const char *InstX86Subss::Base::Opcode = "sub";
3456 &Assembler::sub, &Assembler::sub, &Assembler::sub};
3459 &Assembler::sub, &Assembler::sub};
H A DIceInstX8664.h3221 template <> constexpr const char *InstX86Sub::Base::Opcode = "sub";
3222 template <> constexpr const char *InstX86SubRMW::Base::Opcode = "sub";
3223 template <> constexpr const char *InstX86Subps::Base::Opcode = "sub";
3224 template <> constexpr const char *InstX86Subss::Base::Opcode = "sub";
3353 &Assembler::sub, &Assembler::sub, &Assembler::sub};
3356 &Assembler::sub, &Assembler::sub};
/third_party/vixl/src/aarch32/
H A Dassembler-aarch32.h3504 void sub(Condition cond,
3509 void sub(Register rd, Register rn, const Operand& operand) { in sub() function in vixl::aarch32::Assembler
3510 sub(al, Best, rd, rn, operand); in sub()
3512 void sub(Condition cond, Register rd, Register rn, const Operand& operand) { in sub() function in vixl::aarch32::Assembler
3513 sub(cond, Best, rd, rn, operand); in sub()
3515 void sub(EncodingSize size, in sub() function in vixl::aarch32::Assembler
3519 sub(al, size, rd, rn, operand); in sub()
3522 void sub(Condition cond, Register rd, const Operand& operand);
3523 void sub(Register rd, const Operand& operand) { sub(a function in vixl::aarch32::Assembler
[all...]
/third_party/ffmpeg/libavcodec/x86/
H A Dvp9lpf.asm186 psubusb %1, %4 ; sub the negatives
193 psubusb %1, %4 ; sub the positives
/third_party/icu/tools/unicode/py/
H A Dpreparseucd.py161 return _non_alnum_re.sub("", pname).lower()
292 """Returns True if props is not a sub-dict of c_props."""
1502 for rep in _idna_replacements: line = rep[0].sub(rep[1], line)
/third_party/libunwind/libunwind/doc/
H A Dlibunwind-dynamic.tex111 \item[\Type{union} \Var{u}] This union contains one sub-member
121 The format of these sub-members is described in detail below.
/third_party/node/deps/openssl/config/archs/darwin64-x86_64-cc/asm/crypto/bn/
H A Dx86_64-mont.s212 L$sub: sbbq (%rcx,%r14,8),%rax
217 jnz L$sub
/third_party/node/tools/gyp/pylib/gyp/
H A Dinput.py748 cmd = [re.sub("^cat ", "type ", cmd[0])] + cmd[1:]
750 cmd = re.sub("^cat ", "type ", cmd)
1290 # variables dict (making |variables| a variables sub-dict of a
H A Dxcodeproj_file.py197 return re.sub(r"\$\((.*?)\)", "${\\1}", input_string)
532 # by re.sub with match.group(0) containing a character matched by the
582 return '"' + _escaped.sub(self._EncodeTransform, value) + '"'
/third_party/node/deps/npm/node_modules/node-gyp/gyp/pylib/gyp/
H A Dinput.py748 cmd = [re.sub("^cat ", "type ", cmd[0])] + cmd[1:]
750 cmd = re.sub("^cat ", "type ", cmd)
1280 # variables dict (making |variables| a variables sub-dict of a
H A Dxcodeproj_file.py197 return re.sub(r"\$\((.*?)\)", "${\\1}", input_string)
532 # by re.sub with match.group(0) containing a character matched by the
582 return '"' + _escaped.sub(self._EncodeTransform, value) + '"'
/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.h433 void sub(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
435 void sub(Register dst, Register src1, Register src2, SBit s = LeaveCC,
H A Dassembler-arm.cc1556 void Assembler::sub(Register dst, Register src1, const Operand& src2, SBit s, in sub() function in v8::internal::Assembler
1561 void Assembler::sub(Register dst, Register src1, Register src2, SBit s, in sub() function in v8::internal::Assembler
1563 sub(dst, src1, Operand(src2), s, cond); in sub()
2454 sub(scratch, base, Operand(offset)); in vldr()
2503 sub(scratch, base, Operand(offset)); in vldr()
2553 sub(scratch, base, Operand(offset)); in vstr()
2602 sub(scratch, base, Operand(offset)); in vstr()
/third_party/node/deps/openssl/config/archs/darwin64-x86_64-cc/asm_avx2/crypto/bn/
H A Dx86_64-mont.s212 L$sub: sbbq (%rcx,%r14,8),%rax
217 jnz L$sub
/third_party/python/Lib/asyncio/
H A Dbase_events.py1082 exceptions = [exc for sub in exceptions for exc in sub]
/third_party/skia/third_party/externals/brotli/research/
H A Dbrotlidump.py1064 #determine inserts and copy sub codes
1347 action = re.sub(r"^(.*)(?=\+[U(]*w)", r"b'\1'", action)
1353 action = re.sub(r"(w[[:\-1\]).U]*)\+(.*)$", r"\1+b'\2'", action)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
H A DCommandLine.h465 // sub - Specify the subcommand that this option belongs to.
466 struct sub { struct
469 sub(SubCommand &S) : Sub(S) {} in sub() function
1888 error("cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!"); in done()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
H A DLazyValueInfo.cpp932 BBLV = ValueLatticeElement::getRange(Zero.sub(TrueCR.abs())); in solveBlockValueSelect()
936 BBLV = ValueLatticeElement::getRange(Zero.sub(FalseCR.abs())); in solveBlockValueSelect()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/
H A DCommandLine.h425 // sub - Specify the subcommand that this option belongs to.
426 struct sub { struct
429 sub(SubCommand &S) : Sub(S) {} in sub() function
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
H A DFileCheck.cpp212 static uint64_t sub(uint64_t LeftOp, uint64_t RightOp) { in sub() function
234 EvalBinop = sub; in parseBinop()
/third_party/mesa3d/src/gallium/frontends/omx/bellagio/
H A Dvid_dec_av1.c10 * distribute, sub license, and/or sell copies of the Software, and to
1229 int precDiff, round, sub, mx, r = 0; in read_global_param() local
1243 sub = ((idx % 3) == 2) ? (1 << precBits) : 0; in read_global_param()
1246 r = (ref_params->gm_params[ref][idx] >> precDiff) - sub; in read_global_param()
/third_party/node/deps/v8/src/wasm/baseline/loong64/
H A Dliftoff-assembler-loong64.h1055 I32_BINOP(sub, sub_w)
1071 I32_BINOP_I(sub, Sub_w)
1173 I64_BINOP(sub, Sub_d)
/third_party/node/deps/v8/src/wasm/baseline/arm64/
H A Dliftoff-assembler-arm64.h243 sub(sp, sp, 0); in PrepareStackFrame()
295 // Round the stack to a page to try to fit a add/sub immediate. in AlignFrameSize()
336 // replace the {__ sub(sp, sp, framesize)} with a jump to OOL code that does in PatchPrepareStackFrame()
378 // right after the reserved space for the {__ sub(sp, sp, framesize)} (which in PatchPrepareStackFrame()
682 __ sub(temp, result.gp(), value.gp()); in AtomicBinop()
1028 sub(count_reg, count_reg, 1); in FillStackSlotsWithZero()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/
H A DGPRArith.cpp629 TestImplOp(sub, Dst, Value0, Src, Value1, int, Size, -); \ in TEST_F()
630 TestImplOp(sub, Dst, Value0, Src, Value1, uint, Size, -); \ in TEST_F()
851 TestImplOp(sub, sbb, Dst0, Dst1, Value0, Src0, Src1, Value1, -, Size); \ in TEST_F()

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