/third_party/mesa3d/src/compiler/nir/ |
H A D | nir_lower_interpolation.c | 57 nir_instr_as_intrinsic(intr->src[0].ssa->parent_instr); in nir_lower_interpolation_block() 106 nir_load_fs_input_interp_deltas(b, 32, intr->src[1].ssa, in nir_lower_interpolation_block() 111 nir_ssa_def *bary = intr->src[0].ssa; in nir_lower_interpolation_block() 124 nir_ssa_def_rewrite_uses(&intr->dest.ssa, vec); in nir_lower_interpolation_block()
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H A D | nir_lower_vec3_to_vec4.c | 75 intrin->dest.ssa.num_components = 4; in lower_vec3_to_vec4_impl() 78 nir_ssa_def *vec3 = nir_channels(&b, &intrin->dest.ssa, 0x7); in lower_vec3_to_vec4_impl() 79 nir_ssa_def_rewrite_uses_after(&intrin->dest.ssa, in lower_vec3_to_vec4_impl() 95 nir_ssa_def *data = intrin->src[1].ssa; in lower_vec3_to_vec4_impl()
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H A D | nir_lower_tex_shadow.c | 95 sampler_deref = nir_instr_as_deref(tex->src[sampler_index].src.ssa->parent_instr); in nir_lower_tex_shadow_impl() 103 nir_ssa_def *tex_r = nir_channel(b, &tex->dest.ssa, 0); in nir_lower_tex_shadow_impl() 104 nir_ssa_def *cmp = tex->src[comp_index].src.ssa; in nir_lower_tex_shadow_impl() 108 cmp = nir_fmul(b, cmp, nir_frcp(b, tex->src[proj_index].src.ssa)); in nir_lower_tex_shadow_impl()
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H A D | nir_to_lcssa.c | 26 * This pass converts the ssa-graph into "Loop Closed SSA form". This is 127 return def_is_invariant(src->ssa, (nir_loop *)state); in src_is_invariant() 154 if (!def_is_invariant(if_node->condition.ssa, loop)) in phi_is_invariant() 241 nir_ssa_def *dest = &phi->dest.ssa; in convert_loop_exit_for_ssa() 251 cast->parent = nir_src_for_ssa(&phi->dest.ssa); in convert_loop_exit_for_ssa() 255 phi->dest.ssa.num_components, in convert_loop_exit_for_ssa() 256 phi->dest.ssa.bit_size, NULL); in convert_loop_exit_for_ssa() 258 dest = &cast->dest.ssa; in convert_loop_exit_for_ssa() 262 * the phi instead of pointing to the ssa-def. in convert_loop_exit_for_ssa()
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H A D | nir_lower_io.c | 388 return &load->dest.ssa; in emit_load() 397 if (intrin->dest.ssa.bit_size == 64 && in lower_load() 406 while (dest_comp < intrin->dest.ssa.num_components) { in lower_load() 408 MIN2(intrin->dest.ssa.num_components - dest_comp, in lower_load() 425 return nir_vec(b, comp64, intrin->dest.ssa.num_components); in lower_load() 426 } else if (intrin->dest.ssa.bit_size == 1) { in lower_load() 431 intrin->dest.ssa.num_components, 32, in lower_load() 435 intrin->dest.ssa.num_components, in lower_load() 436 intrin->dest.ssa.bit_size, in lower_load() 509 if (intrin->src[1].ssa in lower_store() [all...] |
H A D | nir_lower_image.c | 49 unsigned coord_comps = intrin->dest.ssa.num_components; in lower_cube_size() 58 nir_ssa_def *vec = nir_vec_scalars(b, comps, intrin->dest.ssa.num_components); in lower_cube_size() 59 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, vec); in lower_cube_size()
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H A D | nir_opt_shrink_vectors.c | 121 nir_ssa_def *def = &instr->dest.dest.ssa; in opt_shrink_vector() 139 nir_ssa_scalar scalar = nir_get_ssa_scalar(instr->src[i].src.ssa, instr->src[i].swizzle[0]); in opt_shrink_vector() 172 nir_ssa_def *def = &instr->dest.dest.ssa; in opt_shrink_vectors_alu() 267 if (shrink_dest_to_read_mask(&instr->dest.ssa)) { in opt_shrink_vectors_intrinsic() 268 instr->num_components = instr->dest.ssa.num_components; in opt_shrink_vectors_intrinsic()
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H A D | nir_opt_memcpy.c | 50 nir_src_for_ssa(&parent->dest.ssa)); in opt_memcpy_deref_cast() 68 nir_src_for_ssa(&parent->dest.ssa)); in opt_memcpy_deref_cast() 188 src = nir_build_deref_cast(b, &src->dest.ssa, in try_lower_memcpy() 208 src = nir_build_deref_cast(b, &src->dest.ssa, in try_lower_memcpy() 220 dst = nir_build_deref_cast(b, &dst->dest.ssa, in try_lower_memcpy()
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H A D | nir.c | 463 dest->ssa = src->ssa; in nir_src_copy() 522 return src->src.is_ssa && (src->src.ssa->num_components == num_components) && in nir_alu_src_is_trivial_ssa() 900 * list_addtail(&phi_src->src.use_link, &src.ssa->uses); 1084 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses); in add_use_cb() 1197 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL); in src_is_valid() 1324 if (!nir_instr_free_and_dce_is_live(src->ssa->parent_instr)) in nir_instr_dce_add_dead_srcs_cb() 1325 nir_instr_worklist_push_tail(wl, src->ssa->parent_instr); in nir_instr_dce_add_dead_srcs_cb() 1328 src->ssa = NULL; in nir_instr_dce_add_dead_srcs_cb() 1401 return state->cb(&dest->ssa, stat in nir_ssa_def_visitor() [all...] |
H A D | nir_loop_analyze.c | 258 if (!mark_invariant(alu->src[i].src.ssa, state)) { in mark_invariant() 307 if (src->src.ssa->parent_instr->type != nir_instr_type_alu) in phi_instr_as_alu() 310 nir_alu_instr *alu = nir_instr_as_alu(src->src.ssa->parent_instr); in phi_instr_as_alu() 327 for (unsigned i = 0; i < alu->dest.dest.ssa.num_components; i++) { in alu_src_has_identity_swizzle() 341 nir_instr *instr = src->ssa->parent_instr; in is_only_uniform_src() 398 nir_loop_variable *src_var = get_loop_var(src->src.ssa, state); in compute_induction_information() 414 src_var = get_loop_var(&src_phi_alu->dest.dest.ssa, state); in compute_induction_information() 436 if (alu->src[1-i].src.ssa == &phi->dest.ssa && in compute_induction_information() 557 if (nif->condition.ssa in find_loop_terminators() [all...] |
H A D | nir_opt_idiv_const.c | 159 unsigned bit_size = alu->src[1].src.ssa->bit_size; in nir_opt_idiv_const_instr() 164 for (unsigned comp = 0; comp < alu->dest.dest.ssa.num_components; comp++) { in nir_opt_idiv_const_instr() 166 nir_ssa_def *n = nir_channel(b, alu->src[0].src.ssa, in nir_opt_idiv_const_instr() 204 nir_ssa_def *qvec = nir_vec(b, q, alu->dest.dest.ssa.num_components); in nir_opt_idiv_const_instr() 205 nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, qvec); in nir_opt_idiv_const_instr() 233 if (alu->dest.dest.ssa.bit_size < min_bit_size) in nir_opt_idiv_const_impl()
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H A D | nir_lower_locals_to_regs.c | 170 src.reg.indirect->ssa = in get_deref_reg_src() 171 nir_iadd(b, src.reg.indirect->ssa, in get_deref_reg_src() 217 intrin->dest.ssa.bit_size, NULL); in lower_locals_to_regs_block() 218 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, in lower_locals_to_regs_block() 219 &mov->dest.dest.ssa); in lower_locals_to_regs_block() 256 nir_instr *parent = mov->src[0].src.ssa->parent_instr; in lower_locals_to_regs_block()
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H A D | nir_group_loads.c | 91 return intr->src[0].ssa->parent_instr; in get_intrinsic_resource() 147 return tex->src[i].src.ssa->parent_instr; in get_uniform_inst_resource() 173 return state->block != src->ssa->parent_instr->block || in has_only_sources_less_than() 174 src->ssa->parent_instr->index < state->first_index; in has_only_sources_less_than() 330 nir_instr *instr = src->ssa->parent_instr; in gather_indirections() 334 unsigned indirections = get_num_indirections(src->ssa->parent_instr); in gather_indirections()
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/third_party/mesa3d/src/imagination/rogue/ |
H A D | rogue_nir_helpers.h | 81 assert(alu->src[src].src.ssa->parent_instr); in nir_alu_src_is_const() 83 return (alu->src[src].src.ssa->parent_instr->type == in nir_alu_src_is_const() 133 assert(intr->src[src].ssa->parent_instr); in nir_intr_src_is_const() 135 return (intr->src[src].ssa->parent_instr->type == nir_instr_type_load_const); in nir_intr_src_is_const()
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/third_party/mesa3d/src/gallium/drivers/lima/ir/ |
H A D | lima_nir_split_loads.c | 54 return &new_intrin->dest.ssa; in clone_intrinsic() 70 if (intrin->src[0].ssa->parent_instr->type == nir_instr_type_load_const) in replace_intrinsic() 75 nir_foreach_use_safe(src, &intrin->dest.ssa) { in replace_intrinsic() 88 nir_foreach_if_use_safe(src, &intrin->dest.ssa) { in replace_intrinsic()
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/third_party/mesa3d/src/gallium/drivers/etnaviv/ |
H A D | etnaviv_compiler_nir.c | 351 nir_instr *instr = src->ssa->parent_instr; in get_src() 362 return const_src(c, nir_instr_as_load_const(instr)->value, src->ssa->num_components); in get_src() 407 vec_dest_has_swizzle(nir_alu_instr *vec, nir_ssa_def *ssa) in vec_dest_has_swizzle() argument 410 if (!(vec->dest.write_mask & (1 << i)) || vec->src[i].src.ssa != ssa) in vec_dest_has_swizzle() 418 nir_foreach_use(use_src, ssa) { in vec_dest_has_swizzle() 723 nir_instr_rewrite_src(&vec->instr, &vec->src[i].src, nir_src_for_ssa(&mov->dest.dest.ssa)); in insert_vec_mov() 767 unsigned num_components = info->input_sizes[i] ?: alu->dest.dest.ssa.num_components; in lower_alu() 808 nir_ssa_def *mov = nir_mov(&b, alu->src[i].src.ssa); in lower_alu() 831 nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, de in lower_alu() 851 nir_ssa_def *ssa = alu->src[i].src.ssa; lower_alu() local [all...] |
/third_party/mesa3d/src/gallium/drivers/vc4/ |
H A D | vc4_nir_lower_io.c | 52 nir_ssa_def_rewrite_uses(&intr->dest.ssa, vec); in replace_intrinsic_with_vec() 245 nir_ssa_def *result = &intr->dest.ssa; in vc4_nir_lower_fs_input() 268 if (result != &intr->dest.ssa) { in vc4_nir_lower_fs_input() 269 nir_ssa_def_rewrite_uses_after(&intr->dest.ssa, in vc4_nir_lower_fs_input() 306 intr->dest.ssa.bit_size, NULL); in vc4_nir_lower_uniform() 319 nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa, in vc4_nir_lower_uniform() 322 dests[i] = &intr_comp->dest.ssa; in vc4_nir_lower_uniform()
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/third_party/mesa3d/src/intel/compiler/ |
H A D | brw_nir_lower_mem_access_bit_sizes.c | 48 dup->src[i] = nir_src_for_ssa(nir_iadd_imm(b, intrin->src[i].ssa, in dup_mem_intrinsic() 51 dup->src[i] = nir_src_for_ssa(intrin->src[i].ssa); in dup_mem_intrinsic() 78 return info->has_dest ? &dup->dest.ssa : NULL; in dup_mem_intrinsic() 89 const unsigned bit_size = intrin->dest.ssa.bit_size; in lower_mem_load_bit_size() 90 const unsigned num_components = intrin->dest.ssa.num_components; in lower_mem_load_bit_size() 148 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, in lower_mem_load_bit_size() 163 nir_ssa_def *value = intrin->src[0].ssa; in lower_mem_store_bit_size()
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H A D | brw_nir_clamp_image_1d_2d_array_sizes.c | 56 image_size = &intr->dest.ssa; in brw_nir_clamp_image_1d_2d_array_sizes_instr() 67 image_size = &intr->dest.ssa; in brw_nir_clamp_image_1d_2d_array_sizes_instr() 85 image_size = &tex_instr->dest.ssa; in brw_nir_clamp_image_1d_2d_array_sizes_instr()
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/third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
H A D | sfn_nir.cpp | 98 align = instr->src[0].ssa->num_components; in r600_nir_lower_scratch_address_impl() 101 align = instr->dest.ssa.num_components; in r600_nir_lower_scratch_address_impl() 104 nir_ssa_def *address = instr->src[address_index].ssa; in r600_nir_lower_scratch_address_impl() 221 auto clip_vtx = intr->src[0].ssa; 233 auto store = nir_store_output(b, clip_i, intr->src[1].ssa); 331 offset = nir_iadd(b, offset, nir_imul(b, d->arr.index.ssa, in r600_lower_deref_instr() 435 nir_ssa_def *addr = op->src[0].ssa; in r600_lower_shared_io_impl() 461 nir_ssa_def_rewrite_uses(&op->dest.ssa, &load->dest.ssa); in r600_lower_shared_io_impl() 464 nir_ssa_def *addr = op->src[1].ssa; in r600_lower_shared_io_impl() [all...] |
/third_party/mesa3d/src/amd/compiler/ |
H A D | aco_instruction_selection.cpp | 706 Temp vec = get_ssa_temp(ctx, src->src.ssa); 707 unsigned src_size = src->src.ssa->bit_size; 735 if (src.src.ssa->num_components == 1 && size == 1) 736 return get_ssa_temp(ctx, src.src.ssa); 738 Temp vec = get_ssa_temp(ctx, src.src.ssa); 739 unsigned elem_size = src.src.ssa->bit_size / 8u; 753 assert(src.src.ssa->bit_size == 8 || src.src.ssa->bit_size == 16); 790 assert(src.src.ssa->bit_size == 16); 793 Temp tmp = get_ssa_temp(ctx, src.src.ssa); [all...] |
/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
H A D | ir2_cp.c | 208 p->ssa.ncomp = 0; in cp_export() 209 memset(p->ssa.comp, 0, sizeof(p->ssa.comp)); in cp_export() 228 c[i]->ssa.ncomp++; in cp_export()
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/third_party/python/Objects/ |
H A D | listobject.c | 1623 /* Merge the na elements starting at ssa with the nb elements starting at 1624 * ssb.keys = ssa.keys + na in a stable way, in-place. na and nb must be > 0. 1625 * Must also have that ssa.keys[na-1] belongs at the end of the merge, and 1630 merge_lo(MergeState *ms, sortslice ssa, Py_ssize_t na, in merge_lo() argument 1638 assert(ms && ssa.keys && ssb.keys && na > 0 && nb > 0); in merge_lo() 1639 assert(ssa.keys + na == ssb.keys); in merge_lo() 1642 sortslice_memcpy(&ms->a, 0, &ssa, 0, na); in merge_lo() 1643 dest = ssa; in merge_lo() 1644 ssa = ms->a; in merge_lo() 1663 k = ISLT(ssb.keys[0], ssa in merge_lo() 1762 merge_hi(MergeState *ms, sortslice ssa, Py_ssize_t na, sortslice ssb, Py_ssize_t nb) merge_hi() argument 1903 sortslice ssa, ssb; merge_at() local [all...] |
/third_party/mesa3d/src/compiler/nir/tests/ |
H A D | comparison_pre_tests.cpp | 507 flt->dest.dest.ssa.num_components = 1; in TEST_F() 510 nir_if *nif = nir_push_if(&bld, &flt->dest.dest.ssa); in TEST_F() 522 fadd->dest.dest.ssa.num_components = 1; in TEST_F() 564 flt->dest.dest.ssa.num_components = 1; in TEST_F() 567 nir_if *nif = nir_push_if(&bld, &flt->dest.dest.ssa); in TEST_F() 579 fadd->dest.dest.ssa.num_components = 2; in TEST_F()
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/third_party/mesa3d/src/freedreno/ir3/ |
H A D | ir3_nir_opt_preamble.c | 128 unsigned components = alu->dest.dest.ssa.num_components; in instr_cost() 150 return all_uses_float(&alu->dest.dest.ssa, true) ? 0 : 1 * components; in instr_cost() 153 return all_uses_float(&alu->dest.dest.ssa, false) ? 0 : 1 * components; in instr_cost() 156 return all_uses_bit(&alu->dest.dest.ssa) ? 0 : 1 * components; in instr_cost() 328 nir_ssa_def *dest = &intrin->dest.ssa; in ir3_nir_lower_preamble() 366 nir_ssa_def *src = intrin->src[0].ssa; in ir3_nir_lower_preamble()
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