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/third_party/ltp/tools/sparse/sparse-src/
H A Dscheck.c108 a = mkvar(btor, s, insn->src1); in binary()
160 a = mkvar(btor, s, insn->src1); in unop()
181 a = mkvar(btor, s, insn->src1); in ternop()
251 pseudo_t src1 = ptr_list_nth(insn->arguments, 0); in check_const() local
256 if (src1 == src2) in check_const()
258 if (src1->type != PSEUDO_VAL) in check_const()
259 sparse_error(insn->pos, "not a constant: %s", show_pseudo(src1)); in check_const()
261 sparse_error(insn->pos, "invalid value: %s != %s", show_pseudo(src1), show_pseudo(src2)); in check_const()
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_disasm.c94 struct etna_inst_src *src1; member
416 print_src(operands->src1, true); in print_opc_default()
429 print_src(operands->src1, true); in print_opc_mov()
439 print_src(operands->src1, true); in print_opc_tex()
448 print_src(operands->src1, true); in print_opc_imm()
563 struct etna_inst_src src1 = { in print_instr() local
590 .src1 = &src1, in print_instr()
/third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/
H A Dir2.c106 struct ir2_src src1, unsigned *comp) in insert()
120 if (src1.type == IR2_SRC_SSA) { in insert()
121 if ((s->instr && s->instr->idx == src1.num) || in insert()
122 (s->instr_s && s->instr_s->idx == src1.num)) in insert()
160 struct ir2_src src1 = instr->src[!order]; in scalarize_case1() local
175 if (src1.type == IR2_SRC_REG) in scalarize_case1()
178 /* we could do something if they match src1.. */ in scalarize_case1()
190 sched = insert(ctx, instr->block_idx, reg->idx, src1, &comp); in scalarize_case1()
197 ins->src[0] = src1; in scalarize_case1()
105 insert(struct ir2_context *ctx, unsigned block_idx, unsigned reg_idx, struct ir2_src src1, unsigned *comp) insert() argument
/third_party/mesa3d/src/intel/compiler/
H A Dbrw_vec4_generator.cpp59 struct brw_reg src1) in generate_math_gfx6()
65 if (src1.file == BRW_GENERAL_REGISTER_FILE) in generate_math_gfx6()
66 check_gfx6_math_src_arg(src1); in generate_math_gfx6()
69 gfx6_math(p, dst, brw_math_function(inst->opcode), src0, src1); in generate_math_gfx6()
78 struct brw_reg src1) in generate_math2_gfx4()
90 struct brw_reg &op0 = is_int_div ? src1 : src0; in generate_math2_gfx4()
91 struct brw_reg &op1 = is_int_div ? src0 : src1; in generate_math2_gfx4()
410 struct brw_reg src1) in generate_gs_set_write_offset()
424 * immediate value in src1, and store the result in DWORDs 3 and 4 of dst. in generate_gs_set_write_offset()
428 * mul(2) dst.3<1>UD src0<8;2,4>UD src1< in generate_gs_set_write_offset()
55 generate_math_gfx6(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) generate_math_gfx6() argument
74 generate_math2_gfx4(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) generate_math2_gfx4() argument
407 generate_gs_set_write_offset(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) generate_gs_set_write_offset() argument
480 generate_gs_svb_write(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) generate_gs_svb_write() argument
648 generate_gs_ff_sync_set_primitives(struct brw_codegen *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) generate_gs_ff_sync_set_primitives() argument
670 generate_gs_ff_sync(struct brw_codegen *p, vec4_instruction *inst, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) generate_gs_ff_sync() argument
[all...]
/third_party/node/deps/v8/src/execution/arm/
H A Dsimulator-arm.cc3949 T src1[kLanes], src2[kLanes]; in Binop() local
3950 simulator->get_neon_register<T, SIZE>(Vn, src1); in Binop()
3953 src1[i] = binop(src1[i], src2[i]); in Binop()
3955 simulator->set_neon_register<T, SIZE>(Vd, src1); in Binop()
4017 T src1[kElems], src2[kElems], dst1[kElems], dst2[kElems]; in Zip() local
4018 simulator->get_neon_register<T, SIZE>(Vd, src1); in Zip()
4021 dst1[i * 2] = src1[i]; in Zip()
4023 dst2[i * 2] = src1[i + kPairs]; in Zip()
4034 T src1[kElem in Unzip() local
4051 T src1[kElems], src2[kElems]; Transpose() local
4125 T src1[kElems], src2[kElems]; Mul() local
4276 T dst[kElems], src1[kElems], src2[kElems]; PairwiseMinMax() local
4290 T dst[kElems], src1[kElems], src2[kElems]; PairwiseAdd() local
4333 NarrowType src1[kElems], src2[kElems]; MultiplyLong() local
4384 uint8_t src1[16], src2[16], dst[16]; DecodeAdvancedSIMDTwoOrThreeRegisters() local
4979 uint64_t src1, src2, dst[2]; DecodeAdvancedSIMDTwoOrThreeRegisters() local
5079 uint32_t src1[4]; DecodeAdvancedSIMDDataProcessing() local
5096 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5105 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5267 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5282 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5291 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5307 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5338 uint32_t dst[4], src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5348 uint64_t src1, src2; DecodeAdvancedSIMDDataProcessing() local
5355 uint32_t src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5497 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
5510 float src1[4], src2[4]; DecodeAdvancedSIMDDataProcessing() local
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/third_party/node/deps/v8/src/codegen/mips64/
H A Dmacro-assembler-mips64.h309 void Push(Register src1, Register src2) { in Push() argument
311 Sd(src1, MemOperand(sp, 1 * kPointerSize)); in Push()
316 void Push(Register src1, Register src2, Register src3) { in Push() argument
318 Sd(src1, MemOperand(sp, 2 * kPointerSize)); in Push()
324 void Push(Register src1, Register src2, Register src3, Register src4) { in Push() argument
326 Sd(src1, MemOperand(sp, 3 * kPointerSize)); in Push()
333 void Push(Register src1, Register src2, Register src3, Register src4, in Push() argument
336 Sd(src1, MemOperand(sp, 4 * kPointerSize)); in Push()
401 void Pop(Register src1, Register src2) { in Pop() argument
402 DCHECK(src1 ! in Pop()
409 Pop(Register src1, Register src2, Register src3) Pop() argument
[all...]
/third_party/node/deps/v8/src/codegen/ppc/
H A Dassembler-ppc.h357 inline void name(const Register src1, const Register src2, \
359 x_form(instr_name, cr, src1, src2, rc); \
361 inline void name##w(const Register src1, const Register src2, \
363 x_form(instr_name, cr.code() * B2, src1.code(), src2.code(), LeaveRC); \
874 void sub(Register dst, Register src1, Register src2, OEBit s = LeaveOE,
877 void subc(Register dst, Register src1, Register src2, OEBit s = LeaveOE,
879 void sube(Register dst, Register src1, Register src2, OEBit s = LeaveOE,
884 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE,
887 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
889 void adde(Register dst, Register src1, Registe
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/third_party/node/deps/v8/src/codegen/arm/
H A Dmacro-assembler-arm.cc497 Register src1) { in MovePair()
499 if (dst0 != src1) { in MovePair()
501 Move(dst1, src1); in MovePair()
504 Move(dst1, src1); in MovePair()
542 void MacroAssembler::Mls(Register dst, Register src1, Register src2, in Mls() argument
546 mls(dst, src1, src2, srcA, cond); in Mls()
551 mul(scratch, src1, src2, LeaveCC, cond); in Mls()
556 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, in And() argument
566 ubfx(dst, src1, 0, in And()
571 and_(dst, src1, src in And()
496 MovePair(Register dst0, Register src0, Register dst1, Register src1) MovePair() argument
575 Ubfx(Register dst, Register src1, int lsb, int width, Condition cond) Ubfx() argument
590 Sbfx(Register dst, Register src1, int lsb, int width, Condition cond) Sbfx() argument
869 VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) CallRecordWriteStub() argument
876 VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2, const Condition cond) CallRecordWriteStub() argument
883 VFPCompareAndSetFlags(const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) CallRecordWriteStub() argument
890 VFPCompareAndSetFlags(const DwVfpRegister src1, const double src2, const Condition cond) CallRecordWriteStub() argument
897 VFPCompareAndLoadFlags(const SwVfpRegister src1, const SwVfpRegister src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
906 VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
915 VFPCompareAndLoadFlags(const DwVfpRegister src1, const DwVfpRegister src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
924 VFPCompareAndLoadFlags(const DwVfpRegister src1, const double src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
2486 MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2) CallRecordWriteStub() argument
2672 I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2681 I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2691 I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2698 I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
[all...]
/third_party/node/deps/v8/src/wasm/baseline/arm64/
H A Dliftoff-assembler-arm64.h1790 LiftoffRegister src1, in emit_f64x2_replace_lane()
1793 if (dst != src1) { in emit_f64x2_replace_lane()
1794 Mov(dst.fp().V2D(), src1.fp().V2D()); in emit_f64x2_replace_lane()
1931 LiftoffRegister src1, in emit_f32x4_replace_lane()
1934 if (dst != src1) { in emit_f32x4_replace_lane()
1935 Mov(dst.fp().V4S(), src1.fp().V4S()); in emit_f32x4_replace_lane()
2055 LiftoffRegister src1, in emit_i64x2_replace_lane()
2058 if (dst != src1) { in emit_i64x2_replace_lane()
2059 Mov(dst.fp().V2D(), src1.fp().V2D()); in emit_i64x2_replace_lane()
2146 LiftoffRegister src1, in emit_i64x2_extmul_low_i32x4_s()
1789 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
1930 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
2054 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2145 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
2151 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
2157 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
2163 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
2205 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
2340 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument
2346 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument
2352 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument
2358 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument
2381 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
2524 VRegister src1 = lhs.fp(); emit_i8x16_shuffle() local
2582 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
[all...]
/third_party/ffmpeg/libavutil/x86/
H A Dfloat_dsp.asm31 ; void vector_fmul(float *dst, const float *src0, const float *src1, int len)
34 cglobal vector_fmul, 4,4,2, dst, src0, src1, len
62 ; void vector_dmul(double *dst, const double *src0, const double *src1, int len)
65 cglobal vector_dmul, 4,4,4, dst, src0, src1, len
295 ; const float *src1, const float *win, int len);
298 cglobal vector_fmul_window, 5, 6, 6, dst, src0, src1, win, len, len1
329 ; vector_fmul_add(float *dst, const float *src0, const float *src1,
333 cglobal vector_fmul_add, 5,5,4, dst, src0, src1, src2, len
370 ; void vector_fmul_reverse(float *dst, const float *src0, const float *src1,
374 cglobal vector_fmul_reverse, 4,4,2, dst, src0, src1, le
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/third_party/pcre2/pcre2/src/sljit/
H A DsljitLir.c1381 sljit_s32 src1, sljit_sw src1w, in check_sljit_emit_op2()
1440 FUNCTION_CHECK_SRC(src1, src1w); in check_sljit_emit_op2()
1454 sljit_verbose_param(compiler, src1, src1w); in check_sljit_emit_op2()
1465 sljit_s32 src1, sljit_sw src1w, in check_sljit_emit_shift_into()
1473 FUNCTION_CHECK_SRC(src1, src1w); in check_sljit_emit_shift_into()
1483 sljit_verbose_param(compiler, src1, src1w); in check_sljit_emit_shift_into()
1608 sljit_s32 src1, sljit_sw src1w, in check_sljit_emit_fop1_cmp()
1626 FUNCTION_FCHECK(src1, src1w); in check_sljit_emit_fop1_cmp()
1636 sljit_verbose_fparam(compiler, src1, src1w); in check_sljit_emit_fop1_cmp()
1707 sljit_s32 src1, sljit_s in check_sljit_emit_fop2()
1379 check_sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 unset, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_op2() argument
1463 check_sljit_emit_shift_into(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src_dst, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_shift_into() argument
1607 check_sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_fop1_cmp() argument
1705 check_sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_fop2() argument
1835 check_sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_cmp() argument
1859 check_sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) check_sljit_emit_fcmp() argument
2469 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_cmp() argument
2565 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fcmp() argument
2814 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2() argument
2831 sljit_emit_op2u(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2u() argument
2845 sljit_emit_shift_into(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src_dst, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_shift_into() argument
2908 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fop2() argument
2950 sljit_emit_cmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_cmp() argument
2964 sljit_emit_fcmp(struct sljit_compiler *compiler, sljit_s32 type, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fcmp() argument
[all...]
H A DsljitNativeARM_64.c1421 sljit_s32 src1, sljit_sw src1w, in sljit_emit_op2()
1427 CHECK(check_sljit_emit_op2(compiler, op, 0, dst, dstw, src1, src1w, src2, src2w)); in sljit_emit_op2()
1429 ADJUST_LOCAL_OFFSET(src1, src1w); in sljit_emit_op2()
1444 if (src1 & SLJIT_MEM) { in sljit_emit_op2()
1445 FAIL_IF(emit_op_mem(compiler, mem_flags, TMP_REG1, src1, src1w, TMP_REG1)); in sljit_emit_op2()
1446 src1 = TMP_REG1; in sljit_emit_op2()
1454 if (src1 & SLJIT_IMM) in sljit_emit_op2()
1457 src1w = src1; in sljit_emit_op2()
1472 sljit_s32 src1, sljit_sw src1w, in sljit_emit_op2u()
1476 CHECK(check_sljit_emit_op2(compiler, op, 1, 0, 0, src1, src1 in sljit_emit_op2u()
1419 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2() argument
1471 sljit_emit_op2u(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_op2u() argument
1482 sljit_emit_shift_into(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src_dst, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_shift_into() argument
1721 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fop1_cmp() argument
1786 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) sljit_emit_fop2() argument
[all...]
/third_party/ffmpeg/libavcodec/
H A Dhuffyuvencdsp.h28 const uint16_t *src1 /* align 16 */,
32 void (*sub_hfyu_median_pred_int16)(uint16_t *dst, const uint16_t *src1,
H A Ddcadsp.c366 static void assemble_freq_bands_c(int32_t *dst, int32_t *src0, int32_t *src1, in assemble_freq_bands_c() argument
371 filter0(src0, src1, coeff[0], len); in assemble_freq_bands_c()
372 filter0(src1, src0, coeff[1], len); in assemble_freq_bands_c()
373 filter0(src0, src1, coeff[2], len); in assemble_freq_bands_c()
374 filter0(src1, src0, coeff[3], len); in assemble_freq_bands_c()
377 filter1(src0, src1, coeff[i + 4], len); in assemble_freq_bands_c()
378 filter1(src1, src0, coeff[i + 12], len); in assemble_freq_bands_c()
379 filter1(src0, src1, coeff[i + 4], len); in assemble_freq_bands_c()
383 *dst++ = *src1++; in assemble_freq_bands_c()
/third_party/node/deps/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc220 ool_name(CodeGenerator* gen, T dst, T src1, T src2) \
221 : OutOfLineCode(gen), dst_(dst), src1_(src1), src2_(src2) {} \
1364 FPURegister src1 = i.InputSingleRegister(0); in AssembleArchInstruction() local
1366 auto ool = zone()->New<OutOfLineFloat32Max>(this, dst, src1, src2); in AssembleArchInstruction()
1367 __ Float32Max(dst, src1, src2, ool->entry()); in AssembleArchInstruction()
1373 FPURegister src1 = i.InputDoubleRegister(0); in AssembleArchInstruction() local
1375 auto ool = zone()->New<OutOfLineFloat64Max>(this, dst, src1, src2); in AssembleArchInstruction()
1376 __ Float64Max(dst, src1, src2, ool->entry()); in AssembleArchInstruction()
1382 FPURegister src1 = i.InputSingleRegister(0); in AssembleArchInstruction() local
1384 auto ool = zone()->New<OutOfLineFloat32Min>(this, dst, src1, src in AssembleArchInstruction()
1391 FPURegister src1 = i.InputDoubleRegister(0); AssembleArchInstruction() local
2137 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
2160 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
2593 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
2646 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
2669 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3360 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3370 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3380 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3390 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3400 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3410 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3420 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3474 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3484 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3494 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3504 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3514 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3524 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3548 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3558 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3568 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3578 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3588 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3598 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3615 src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3725 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3735 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3762 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
3772 Simd128Register src1 = i.InputSimd128Register(1); AssembleArchInstruction() local
[all...]
/third_party/ffmpeg/libswscale/
H A Drgb2rgb_template.c710 static void interleaveBytes_c(const uint8_t *src1, const uint8_t *src2, in interleaveBytes_c() argument
719 dest[2 * w + 0] = src1[w]; in interleaveBytes_c()
723 src1 += src1Stride; in interleaveBytes_c()
746 static inline void vu9_to_vu12_c(const uint8_t *src1, const uint8_t *src2, in vu9_to_vu12_c() argument
757 const uint8_t *s1 = src1 + srcStride1 * (y >> 1); in vu9_to_vu12_c()
770 static inline void yvu9_to_yuy2_c(const uint8_t *src1, const uint8_t *src2, in yvu9_to_yuy2_c() argument
781 const uint8_t *yp = src1 + srcStride1 * y; in yvu9_to_yuy2_c()
824 static void extract_even2avg_c(const uint8_t *src0, const uint8_t *src1, in extract_even2avg_c() argument
830 src1 += count * 4; in extract_even2avg_c()
833 dst0[count] = (src0[4 * count + 0] + src1[ in extract_even2avg_c()
854 extract_odd2avg_c(const uint8_t *src0, const uint8_t *src1, uint8_t *dst0, uint8_t *dst1, int count) extract_odd2avg_c() argument
[all...]
/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.h755 inline T CanonicalizeFPUOpFMA(Func fn, T dst, T src1, T src2) { in CanonicalizeFPUOpFMA() argument
757 auto alu_out = fn(dst, src1, src2); in CanonicalizeFPUOpFMA()
759 if (std::isnan(alu_out) || std::isnan(src1) || std::isnan(src2) || in CanonicalizeFPUOpFMA()
762 if (isSnan(alu_out) || isSnan(src1) || isSnan(src2) || isSnan(dst)) in CanonicalizeFPUOpFMA()
772 T src1 = std::is_same<float, T>::value ? frs1() : drs1(); in CanonicalizeFPUOp3() local
775 auto alu_out = fn(src1, src2, src3); in CanonicalizeFPUOp3()
777 if (std::isnan(alu_out) || std::isnan(src1) || std::isnan(src2) || in CanonicalizeFPUOp3()
780 if (isSnan(alu_out) || isSnan(src1) || isSnan(src2) || isSnan(src3)) in CanonicalizeFPUOp3()
790 T src1 = std::is_same<float, T>::value ? frs1() : drs1(); in CanonicalizeFPUOp2() local
792 auto alu_out = fn(src1, src in CanonicalizeFPUOp2()
806 T src1 = std::is_same<float, T>::value ? frs1() : drs1(); CanonicalizeFPUOp1() local
[all...]
/third_party/ffmpeg/libswscale/x86/
H A Drgb2rgb_template.c1746 static void RENAME(interleaveBytes)(const uint8_t *src1, const uint8_t *src2, uint8_t *dest, in interleaveBytes() argument
1756 if (!((((intptr_t)src1) | ((intptr_t)src2) | ((intptr_t)dest))&15)) { in interleaveBytes()
1772 ::"r"(dest), "r"(src1), "r"(src2), "r" ((x86_reg)width-15) in interleaveBytes()
1798 ::"r"(dest), "r"(src1), "r"(src2), "r" ((x86_reg)width-15) in interleaveBytes()
1804 dest[2*w+0] = src1[w]; in interleaveBytes()
1808 src1 += src1Stride; in interleaveBytes()
1823 const uint8_t *src1,
1848 static inline void RENAME(vu9_to_vu12)(const uint8_t *src1, const uint8_t *src2, in vu9_to_vu12() argument
1860 ::"m"(*(src1+srcStride1)),"m"(*(src2+srcStride2)):"memory"); in vu9_to_vu12()
1862 const uint8_t* s1=src1 in vu9_to_vu12()
1940 yvu9_to_yuy2(const uint8_t *src1, const uint8_t *src2, const uint8_t *src3, uint8_t *dst, int width, int height, int srcStride1, int srcStride2, int srcStride3, int dstStride) yvu9_to_yuy2() argument
2149 extract_even2avg(const uint8_t *src0, const uint8_t *src1, uint8_t *dst0, uint8_t *dst1, x86_reg count) extract_even2avg() argument
2249 extract_odd2avg(const uint8_t *src0, const uint8_t *src1, uint8_t *dst0, uint8_t *dst1, x86_reg count) extract_odd2avg() argument
[all...]
/third_party/node/deps/v8/src/codegen/mips/
H A Dmacro-assembler-mips.h289 void Push(Register src1, Register src2) { in Push() argument
291 sw(src1, MemOperand(sp, 1 * kPointerSize)); in Push()
296 void Push(Register src1, Register src2, Register src3) { in Push() argument
298 sw(src1, MemOperand(sp, 2 * kPointerSize)); in Push()
304 void Push(Register src1, Register src2, Register src3, Register src4) { in Push() argument
306 sw(src1, MemOperand(sp, 3 * kPointerSize)); in Push()
313 void Push(Register src1, Register src2, Register src3, Register src4, in Push() argument
316 sw(src1, MemOperand(sp, 4 * kPointerSize)); in Push()
381 void Pop(Register src1, Register src2) { in Pop() argument
382 DCHECK(src1 ! in Pop()
389 Pop(Register src1, Register src2, Register src3) Pop() argument
[all...]
/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/
H A Dlower.c201 ppir_src *src1 = &alu->src[1]; in ppir_lower_select() local
225 /* src1 could also be a reference from the same node as in ppir_lower_select()
227 if (src1->node && src1->node == cond) in ppir_lower_select()
228 ppir_node_target_assign(src1, cond); in ppir_lower_select()
265 /* src1 could also be a reference from the same node as in ppir_lower_select()
267 if (src1->node && src1->node == pred) in ppir_lower_select()
268 ppir_node_target_assign(src1, move); in ppir_lower_select()
/third_party/ffmpeg/libavfilter/
H A Dcolorspacedsp_yuv2yuv_template.c47 const ipixel *src0 = src[0], *src1 = src[1], *src2 = src[2]; in yuv2yuv() local
73 int u = src1[x] - uv_off_in, v = src2[x] - uv_off_in; in yuv2yuv()
95 src1 += src_stride[1] / sizeof(ipixel); in yuv2yuv()
/third_party/mesa3d/src/gallium/drivers/svga/svgadump/
H A Dsvga_shader.h194 struct sh_srcreg src1; member
209 struct sh_srcreg src1; member
217 struct sh_srcreg src1; member
/third_party/musl/libc-test/src/functionalext/supplement/linux/
H A Dprocess_vm.c48 char src1[__VALUE_BUFFER_SIZE__] = "This is process_vm_writev_0200_1."; in process_vm_writev_0200() local
57 {.iov_base = src1, .iov_len = sizeof(src1)}, in process_vm_writev_0200()
/third_party/skia/third_party/externals/libwebp/tests/fuzzer/
H A Denc_dec_fuzzer.cc114 const uint32_t* src1 = (const uint32_t*)rgba; in LLVMFuzzerTestOneInput() local
116 for (int y = 0; y < h; ++y, src1 += w, src2 += pic.argb_stride) { in LLVMFuzzerTestOneInput()
118 uint32_t v1 = src1[x], v2 = src2[x]; in LLVMFuzzerTestOneInput()
/third_party/ffmpeg/libavcodec/mips/
H A Dpixblockdsp_mips.h27 void ff_diff_pixels_msa(int16_t *av_restrict block, const uint8_t *src1,
36 void ff_diff_pixels_mmi(int16_t *av_restrict block, const uint8_t *src1,

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