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/third_party/ffmpeg/libavcodec/x86/
H A Dhuffyuvencdsp_init.c31 void ff_diff_int16_sse2(uint16_t *dst, const uint16_t *src1, const uint16_t *src2,
33 void ff_diff_int16_avx2(uint16_t *dst, const uint16_t *src1, const uint16_t *src2,
35 void ff_sub_hfyu_median_pred_int16_mmxext(uint16_t *dst, const uint16_t *src1, const uint16_t *src2,
/third_party/ffmpeg/libavcodec/
H A Dpngdsp.c31 static void add_bytes_l2_c(uint8_t *dst, uint8_t *src1, uint8_t *src2, int w) in add_bytes_l2_c() argument
35 long a = *(long *)(src1 + i); in add_bytes_l2_c()
40 dst[i] = src1[i] + src2[i]; in add_bytes_l2_c()
H A Dlossless_videodsp.c42 static void add_median_pred_c(uint8_t *dst, const uint8_t *src1, in add_median_pred_c() argument
53 l = mid_pred(l, src1[i], (l + src1[i] - lt) & 0xFF) + diff[i]; in add_median_pred_c()
54 lt = src1[i]; in add_median_pred_c()
/third_party/ffmpeg/libavutil/arm/
H A Dfloat_dsp_init_vfp.c26 void ff_vector_fmul_vfp(float *dst, const float *src0, const float *src1,
30 const float *src1, const float *win, int len);
33 const float *src1, int len);
/third_party/mesa3d/src/amd/common/
H A Dac_nir_lower_global_access.c38 nir_ssa_scalar src1 = nir_ssa_scalar_chase_alu_src(scalar, 1); in try_extract_additions() local
41 nir_ssa_scalar src = i ? src1 : src0; in try_extract_additions()
56 try_extract_additions(b, i == 1 ? src0 : src1, out_const, out_offset); in try_extract_additions()
61 nir_ssa_def *replace_src1 = try_extract_additions(b, src1, out_const, out_offset); in try_extract_additions()
66 replace_src1 = replace_src1 ? replace_src1 : nir_channel(b, src1.def, src1.comp); in try_extract_additions()
/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_qpu.h141 struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
143 struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
174 qpu_a_##op(struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) \
176 return qpu_a_alu2(QPU_A_##op, dst, src0, src1); \
181 qpu_m_##op(struct qpu_reg dst, struct qpu_reg src0, struct qpu_reg src1) \
183 return qpu_m_alu2(QPU_M_##op, dst, src0, src1); \
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_nir.c95 nir_src *src1 = NULL; in etna_lower_io() local
107 assert(!src1); in etna_lower_io()
108 src1 = &tex->src[i].src; in etna_lower_io()
123 if (!src1 || v->shader->specs->halti >= 5) in etna_lower_io()
126 assert(coord && src1 && tex->coord_components < 4); in etna_lower_io()
134 vec->src[i].src = nir_src_for_ssa(src1->ssa); in etna_lower_io()
/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Drescaler_mips32.c37 const uint8_t* src1 = src + channel; in ImportRowShrink_MIPS32() local
54 "lbu %[base], 0(%[src1]) \n\t" in ImportRowShrink_MIPS32()
56 "addu %[src1], %[src1], %[x_stride] \n\t" in ImportRowShrink_MIPS32()
71 : [accum]"=&r"(accum), [src1]"+r"(src1), [temp3]"=&r"(temp3), in ImportRowShrink_MIPS32()
97 const uint8_t* src1 = src + channel; in ImportRowExpand_MIPS32() local
106 "lbu %[temp2], 0(%[src1]) \n\t" in ImportRowExpand_MIPS32()
107 "addu %[src1], %[src1], in ImportRowExpand_MIPS32()
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/third_party/node/deps/v8/src/codegen/loong64/
H A Dmacro-assembler-loong64.h243 void Push(Register src1, Register src2) { in Push() argument
245 St_d(src1, MemOperand(sp, 1 * kPointerSize)); in Push()
250 void Push(Register src1, Register src2, Register src3) { in Push() argument
252 St_d(src1, MemOperand(sp, 2 * kPointerSize)); in Push()
258 void Push(Register src1, Register src2, Register src3, Register src4) { in Push() argument
260 St_d(src1, MemOperand(sp, 3 * kPointerSize)); in Push()
267 void Push(Register src1, Register src2, Register src3, Register src4, in Push() argument
270 St_d(src1, MemOperand(sp, 4 * kPointerSize)); in Push()
337 void Pop(Register src1, Register src2) { in Pop() argument
338 DCHECK(src1 ! in Pop()
345 Pop(Register src1, Register src2, Register src3) Pop() argument
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/third_party/mesa3d/src/compiler/nir/
H A Dnir_range_analysis.c1272 nir_ssa_scalar src1 = nir_ssa_scalar_chase_alu_src(scalar, 1); in search_phi_bcsel() local
1276 added += search_phi_bcsel(src1, buf + added, buf_size, visited); in search_phi_bcsel()
1381 uint32_t src1 = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[1].ssa, 0), config); in nir_unsigned_upper_bound() local
1383 if (src0 + src1 < src0) in nir_unsigned_upper_bound()
1386 res = src0 + src1; in nir_unsigned_upper_bound()
1441 uint32_t src1 = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[1].ssa, 0), config); in nir_unsigned_upper_bound() local
1442 res = MAX2(src0, src1); in nir_unsigned_upper_bound()
1534 uint32_t src1 = max, src2 = max; in nir_unsigned_upper_bound() local
1536 src1 = nir_unsigned_upper_bound(shader, range_ht, nir_ssa_scalar_chase_alu_src(scalar, 1), config); in nir_unsigned_upper_bound()
1543 res = src0 < src1 in nir_unsigned_upper_bound()
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H A Dnir_lower_alu.c137 nir_ssa_def *src1 = nir_ssa_for_alu_src(b, instr, 1); in lower_alu_instr() local
145 nir_ssa_def *src1_32 = nir_build_alu(b, upcast_op, src1, NULL, NULL, NULL); in lower_alu_instr()
158 nir_ilt(b, src1, c0)); in lower_alu_instr()
160 src1 = nir_iabs(b, src1); in lower_alu_instr()
171 nir_ssa_def *src1l = nir_iand(b, src1, cmask); in lower_alu_instr()
173 nir_ssa_def *src1h = nir_ushr(b, src1, cshift); in lower_alu_instr()
/third_party/ffmpeg/libavcodec/mips/
H A Dvp9_intra_msa.c49 v16u8 src1, src2; in ff_vert_32x32_msa() local
51 src1 = LD_UB(src); in ff_vert_32x32_msa()
55 ST_UB2(src1, src2, dst, 16); in ff_vert_32x32_msa()
64 v16u8 src0, src1, src2, src3; in ff_hor_16x16_msa() local
72 src1 = (v16u8) __msa_fill_b(inp >> 16); in ff_hor_16x16_msa()
76 ST_UB4(src0, src1, src2, src3, dst, dst_stride); in ff_hor_16x16_msa()
85 v16u8 src0, src1, src2, src3; in ff_hor_32x32_msa() local
93 src1 = (v16u8) __msa_fill_b(inp >> 16); in ff_hor_32x32_msa()
99 ST_UB2(src1, src1, ds in ff_hor_32x32_msa()
363 v16u8 src0, src1, src2, src3; ff_tm_4x4_msa() local
392 v16u8 src0, src1, src2, src3; ff_tm_8x8_msa() local
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H A Dpixblockdsp_mmi.c97 void ff_diff_pixels_mmi(int16_t *av_restrict block, const uint8_t *src1, in ff_diff_pixels_mmi() argument
108 MMI_LDC1(%[ftmp0], %[src1], 0x00) in ff_diff_pixels_mmi()
122 PTR_ADDU "%[src1], %[src1], %[stride] \n\t" in ff_diff_pixels_mmi()
130 [block]"+&r"(block), [src1]"+&r"(src1), in ff_diff_pixels_mmi()
/third_party/skia/third_party/externals/icu/source/i18n/
H A Ducol.cpp117 ucol_mergeSortkeys(const uint8_t *src1, int32_t src1Length, in ucol_mergeSortkeys() argument
121 if( src1==NULL || src1Length<-1 || src1Length==0 || (src1Length>0 && src1[src1Length-1]!=0) || in ucol_mergeSortkeys()
134 src1Length=(int32_t)uprv_strlen((const char *)src1)+1; in ucol_mergeSortkeys()
149 /* copy level from src1 not including 00 or 01 */ in ucol_mergeSortkeys()
151 while((b=*src1)>=2) { in ucol_mergeSortkeys()
152 ++src1; in ucol_mergeSortkeys()
166 if(*src1==1 && *src2==1) { in ucol_mergeSortkeys()
167 ++src1; in ucol_mergeSortkeys()
180 if(*src1! in ucol_mergeSortkeys()
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/third_party/ffmpeg/libavfilter/
H A Dscene_sad.c29 const uint16_t *src1w = (const uint16_t *)src1; in ff_scene_sad16_c()
52 sad += FFABS(src1[x] - src2[x]); in ff_scene_sad_c()
53 src1 += stride1; in ff_scene_sad_c()
/third_party/ffmpeg/libavcodec/ppc/
H A Dfmtconvert_altivec.c39 vector float src1, src2, dst1, dst2, mul_v, zero; in int32_to_float_fmul_scalar_altivec() local
46 src1 = vec_ctf(vec_ld(0, src+i), 0); in int32_to_float_fmul_scalar_altivec()
48 dst1 = vec_madd(src1, mul_v, zero); in int32_to_float_fmul_scalar_altivec()
/third_party/skia/third_party/externals/swiftshader/src/Shader/
H A DPixelPipeline.cpp88 const Src &src1 = instruction->src[1]; in applyShader() local
101 if(src1.type != Shader::PARAMETER_VOID) s1 = fetchRegister(src1); in applyShader()
1458 void PixelPipeline::ADD(Vector4s &dst, Vector4s &src0, Vector4s &src1)
1460 dst.x = AddSat(src0.x, src1.x);
1461 dst.y = AddSat(src0.y, src1.y);
1462 dst.z = AddSat(src0.z, src1.z);
1463 dst.w = AddSat(src0.w, src1.w);
1466 void PixelPipeline::SUB(Vector4s &dst, Vector4s &src0, Vector4s &src1)
1468 dst.x = SubSat(src0.x, src1
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/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_emit_gv100.cpp59 CodeEmitterGV100::emitFormA_RRC(uint16_t op, int src1, int src2) in emitFormA_RRC() argument
62 if (src1 >= 0) { in emitFormA_RRC()
63 emitNEG (75, (src1 & FA_SRC_MASK), (src1 & FA_SRC_NEG)); in emitFormA_RRC()
64 emitABS (74, (src1 & FA_SRC_MASK), (src1 & FA_SRC_ABS)); in emitFormA_RRC()
65 emitGPR (64, insn->src(src1 & FA_SRC_MASK)); in emitFormA_RRC()
75 CodeEmitterGV100::emitFormA_RRI(uint16_t op, int src1, int src2) in emitFormA_RRI() argument
78 if (src1 >= 0) { in emitFormA_RRI()
79 emitNEG (75, (src1 in emitFormA_RRI()
88 emitFormA_RRR(uint16_t op, int src1, int src2) emitFormA_RRR() argument
105 emitFormA(uint16_t op, uint8_t forms, int src0, int src1, int src2) emitFormA() argument
1215 int src1 = insn->predSrc == 1 ? 2 : 1; emitTEXs() local
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H A Dnv50_ir_lowering_gv100.cpp122 uint8_t src1 = NV50_IR_SUBOP_LOP3_LUT_SRC1; in handleLOP2() local
128 src1 = ~src1; in handleLOP2()
131 case OP_AND: subOp = src0 & src1; break; in handleLOP2()
132 case OP_OR : subOp = src0 | src1; break; in handleLOP2()
133 case OP_XOR: subOp = src0 ^ src1; break; in handleLOP2()
216 Value *src1 = i->getSrc(1); in handleShift() local
231 bld.mkOp3(OP_SHF, i->dType, i->getDef(0), src0, src1, src2)->subOp = subOp; in handleShift()
332 Value *src0[2], *src1[2], *dest[2]; in handleDMNMX() local
337 bld.mkSplit(src1, in handleDMNMX()
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/third_party/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_bld_blend_aos.c72 LLVMValueRef src1; member
99 LLVMValueRef src1_alpha = bld->src1_alpha ? bld->src1_alpha : bld->src1; in lp_build_blend_factor_unswizzled()
151 return bld->src1; in lp_build_blend_factor_unswizzled()
176 return lp_build_comp(&bld->base, bld->src1); in lp_build_blend_factor_unswizzled()
299 * @param src1 second blend src (for dual source blend)
300 * @param src1_alpha second blend src alpha (if not included in src1)
317 LLVMValueRef src1, in lp_build_blend_aos()
336 bld.src1 = src1; in lp_build_blend_aos()
310 lp_build_blend_aos(struct gallivm_state *gallivm, const struct pipe_blend_state *blend, enum pipe_format cbuf_format, struct lp_type type, unsigned rt, LLVMValueRef src, LLVMValueRef src_alpha, LLVMValueRef src1, LLVMValueRef src1_alpha, LLVMValueRef dst, LLVMValueRef mask, LLVMValueRef const_, LLVMValueRef const_alpha, const unsigned char swizzle[4], int nr_channels) lp_build_blend_aos() argument
/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_translate.c475 uint32_t src0, src1, src2, flags; in i915_translate_instruction() local
495 src1 = src_vector(p, &inst->Src[1], fs); in i915_translate_instruction()
499 src1); /* NOTE: order of src2, src1 */ in i915_translate_instruction()
514 src1 = src_vector(p, &inst->Src[1], fs); in i915_translate_instruction()
518 swizzle(src0, X, Y, ZERO, ZERO), src1, 0); in i915_translate_instruction()
531 src1 = src_vector(p, &inst->Src[1], fs); in i915_translate_instruction()
540 swizzle(src1, ONE, Y, ONE, W), 0); in i915_translate_instruction()
630 src1 = src_vector(p, &inst->Src[1], fs); in i915_translate_instruction()
642 i915_emit_arith(p, A0_MAD, tmp, flags & A0_DEST_CHANNEL_ALL, 0, src1, in i915_translate_instruction()
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/third_party/mesa3d/src/intel/tools/
H A Di965_gram.y169 struct brw_reg src1)
173 brw_ADDC(p, dest, src0, src1);
176 brw_BFI1(p, dest, src0, src1);
179 brw_DP2(p, dest, src0, src1);
182 brw_DP3(p, dest, src0, src1);
185 brw_DP4(p, dest, src0, src1);
188 brw_DPH(p, dest, src0, src1);
191 brw_LINE(p, dest, src0, src1);
194 brw_MAC(p, dest, src0, src1);
197 brw_MACH(p, dest, src0, src1);
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/third_party/ffmpeg/tests/checkasm/
H A Dvideodsp.c40 call_new((type *) dst1, (const type *) (src1 + y * pw + x), \
45 bench_new((type *) dst1, (const type *) (src1 + y * pw + x),\
53 LOCAL_ALIGNED_16(type, src1, [src_w * src_h]); \
58 memcpy(src1, src0, pw * ph * sizeof(type)); \
/third_party/optimized-routines/string/test/
H A Dmemcmp.c52 unsigned char *src1 = alignup (s1buf); in test() local
54 unsigned char *s1 = src1 + s1align; in test()
68 src1[i] = src2[i] = '?'; in test()
84 quoteat ("src1", src1, len + A, diffpos); in test()
/third_party/node/deps/v8/src/codegen/ppc/
H A Dmacro-assembler-ppc.h155 void CmpS64(Register src1, const Operand& src2, Register scratch,
157 void CmpS64(Register src1, Register src2, CRegister cr = cr7);
158 void CmpU64(Register src1, const Operand& src2, Register scratch,
160 void CmpU64(Register src1, Register src2, CRegister cr = cr7);
161 void CmpS32(Register src1, const Operand& src2, Register scratch,
163 void CmpS32(Register src1, Register src2, CRegister cr = cr7);
164 void CmpU32(Register src1, const Operand& src2, Register scratch,
166 void CmpU32(Register src1, Register src2, CRegister cr = cr7);
167 void CompareTagged(Register src1, Register src2, CRegister cr = cr7) { in CompareTagged() argument
169 CmpS32(src1, src in CompareTagged()
472 Push(Register src1, Register src2) Push() argument
478 Push(Register src1, Register src2, Register src3) Push() argument
485 Push(Register src1, Register src2, Register src3, Register src4) Push() argument
493 Push(Register src1, Register src2, Register src3, Register src4, Register src5) Push() argument
509 Pop(Register src1, Register src2) Pop() argument
516 Pop(Register src1, Register src2, Register src3) Pop() argument
524 Pop(Register src1, Register src2, Register src3, Register src4) Pop() argument
533 Pop(Register src1, Register src2, Register src3, Register src4, Register src5) Pop() argument
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