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/third_party/mesa3d/src/gallium/auxiliary/util/
H A Du_vbuf.h70 void u_vbuf_get_caps(struct pipe_screen *screen, struct u_vbuf_caps *caps,
H A Du_range.h67 p_atomic_read(&resource->screen->num_contexts) == 1) { in util_range_add()
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_rasterizer.c55 COND(VIV_FEATURE(ctx->screen, chipMinorFeatures1, WIDE_LINE), VIVS_PA_CONFIG_WIDE_LINE); in etna_rasterizer_state_create()
/third_party/mesa3d/src/gallium/auxiliary/pipe-loader/
H A Dpipe_loader.h88 * \param dev Device the screen will be created for.
97 * \param dev Device the screen will be created for.
105 * Drivers may parse during screen creation, but for those that don't (probably
204 struct pipe_screen *screen);
/third_party/mesa3d/src/gallium/auxiliary/postprocess/
H A Dpp_private.h41 struct pipe_screen *screen; member
/third_party/mesa3d/src/gallium/drivers/r600/
H A Dcompute_memory_pool.h65 struct r600_screen *screen; member
H A Dradeon_uvd.c74 struct pipe_screen *screen; member
893 if (!rvid_resize_buffer(dec->screen, &dec->cs, buf, new_size)) { in ruvd_decode_bitstream()
1091 dec->screen = context->screen; in ruvd_create_decoder()
1106 if (!rvid_create_buffer(dec->screen, &dec->msg_fb_it_buffers[i], in ruvd_create_decoder()
1112 if (!rvid_create_buffer(dec->screen, &dec->bs_buffers[i], in ruvd_create_decoder()
1124 if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) { in ruvd_create_decoder()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_sdma_copy_image.c55 struct radeon_info *info = &sctx->screen->info; in encode_legacy_tile_info()
210 vi_alpha_is_on_msb(sctx->screen, tiled->buffer.b.b.format) << 8 | in si_sdma_v4_v5_copy_texture()
227 struct radeon_info *info = &sctx->screen->info; in cik_sdma_copy_texture()
425 if (sctx->screen->debug_flags & DBG(NO_DMA) || sctx->gfx_level < GFX7) in si_sdma_copy_image()
H A Dsi_state_viewport.c34 * in screen space. in si_get_small_prim_cull_info()
91 assert(sctx->screen->use_ngg_culling); in si_emit_cull_state()
288 /* Determine the optimal hardware screen offset to center the viewport in si_emit_guardband()
297 ctx->gfx_level >= GFX8 ? 16 : MAX2(ctx->screen->se_tile_repeat, 16); in si_emit_guardband()
312 /* Align the screen offset by dropping the low bits. */ in si_emit_guardband()
455 if ((ctx->family == CHIP_VEGA10 || ctx->family == CHIP_RAVEN) && ctx->screen->dpbb_allowed) in si_set_viewport_states()
486 if (ctx->screen->use_ngg_culling) in si_set_viewport_states()
H A Dsi_shader.h491 struct si_screen *screen; member
979 void si_shader_dump_stats_for_shader_db(struct si_screen *screen, struct si_shader *shader,
1001 char *si_finalize_nir(struct pipe_screen *screen, void *nirptr);
H A Dsi_cp_dma.c262 sctx->scratch_buffer = si_aligned_buffer_create(&sctx->screen->b, in si_cp_dma_realign_engine()
407 src = pipe_buffer_create(ctx->screen, 0, PIPE_USAGE_DEFAULT, 16); in si_test_gds()
408 dst = pipe_buffer_create(ctx->screen, 0, PIPE_USAGE_DEFAULT, 16); in si_test_gds()
/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_state_sampler.c71 struct pipe_screen *screen = svga->pipe.screen; in svga_check_sampler_view_resource_collision() local
74 if (svga_screen(screen)->debug.no_surface_view) { in svga_check_sampler_view_resource_collision()
132 struct svga_screen *ss = svga_screen(svga->pipe.screen); in svga_validate_pipe_sampler_view()
H A Dsvga_state_framebuffer.c56 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); in emit_fb_vgpu9()
140 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); in svga_reemit_framebuffer_bindings_vgpu9()
186 const struct svga_screen *ss = svga_screen(svga->pipe.screen); in emit_fb_vgpu10()
426 /* Examine gallium viewport transformation and produce a screen in get_viewport_prescale()
551 * screen-space coordinates slightly relative to D3D which is in get_viewport_prescale()
698 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); in emit_viewport()
790 struct svga_screen *svgascreen = svga_screen(svga->pipe.screen); in emit_scissor_rect()
/third_party/mesa3d/src/gallium/frontends/nine/
H A Dvolume9.c87 This->info.screen = pParams->device->screen; in NineVolume9_ctor()
99 This->info.format = d3d9_to_pipe_format_checked(This->info.screen, in NineVolume9_ctor()
115 This->format_internal = d3d9_to_pipe_format_checked(This->info.screen, in NineVolume9_ctor()
H A Ddevice9.c114 struct pipe_screen *screen, in nine_resource_create_with_retry()
118 res = screen->resource_create(screen, templat); in nine_resource_create_with_retry()
131 return screen->resource_create(screen, templat); in nine_resource_create_with_retry()
205 This->screen = pScreen; in NineDevice9_ctor()
243 (This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX, in NineDevice9_ctor()
246 This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTE in NineDevice9_ctor()
113 nine_resource_create_with_retry( struct NineDevice9 *This, struct pipe_screen *screen, const struct pipe_resource *templat ) nine_resource_create_with_retry() argument
1677 struct pipe_screen *screen = This->screen; NineDevice9_StretchRect() local
[all...]
/third_party/mesa3d/src/gallium/drivers/iris/
H A Diris_context.h866 iris_create_context(struct pipe_screen *screen, void *priv, unsigned flags);
941 if (unlikely(batch->screen->driconf.always_flush_cache)) \
973 iris_disk_cache_retrieve(struct iris_screen *screen,
1004 void iris_upload_shader(struct iris_screen *screen,
/third_party/mesa3d/src/gallium/auxiliary/vl/
H A Dvl_bicubic_filter.c154 struct pipe_screen *screen = filter->pipe->screen; in create_frag_shader() local
164 if (screen->get_shader_param( in create_frag_shader()
165 screen, PIPE_SHADER_FRAGMENT, PIPE_SHADER_CAP_MAX_TEMPS) < 23) { in create_frag_shader()
H A Dvl_zscan.c408 res = pipe->screen->resource_create(pipe->screen, &res_tmpl); in vl_zscan_layout()
523 res = zscan->pipe->screen->resource_create(zscan->pipe->screen, &res_tmpl); in vl_zscan_init_buffer()
H A Dvl_mc.c82 calc_line(struct pipe_screen *screen, struct ureg_program *shader) in calc_line() argument
89 if (screen->get_param(screen, PIPE_CAP_FS_POSITION_IS_SYSVAL)) in calc_line()
184 field = calc_line(r->pipe->screen, shader); in create_ref_frag_shader()
331 tmp = calc_line(r->pipe->screen, shader); in create_ycbcr_frag_shader()
/third_party/mesa3d/src/glx/
H A Ddri3_glx.c625 /* Free the direct rendering per screen data */ in dri3_destroy_screen()
826 * Initialize DRI3 on the specified screen.
833 * Initializes the driver for the screen and sets up our structures
837 dri3_create_screen(int screen, struct glx_display * priv) in dri3_create_screen() argument
857 if (!glx_screen_init(&psc->base, screen, priv)) { in dri3_create_screen()
862 psc->fd = loader_dri3_open(c, RootWindow(priv->dpy, screen), None); in dri3_create_screen()
868 InfoMessageF("screen %d does not appear to be DRI3 capable\n", screen); in dri3_create_screen()
922 psc->image_driver->createNewScreen2(screen, psc->fd_display_gpu, in dri3_create_screen()
933 psc->image_driver->createNewScreen2(screen, ps in dri3_create_screen()
[all...]
/third_party/mesa3d/src/gallium/drivers/v3d/
H A Dv3d_program.c306 s = tgsi_to_nir(ir, pctx->screen, false); in v3d_uncompiled_shader_create()
399 qpu_insts = v3d_compile(v3d->screen->compiler, key, in v3d_get_compiled_shader()
434 int total_spill_size = (v3d->screen->devinfo.qpu_count * 4 * in v3d_get_compiled_shader()
438 v3d->prog.spill_bo = v3d_bo_alloc(v3d->screen, in v3d_get_compiled_shader()
458 const struct v3d_device_info *devinfo = &v3d->screen->devinfo; in v3d_setup_shared_key()
598 v3d_get_format_swizzle(&v3d->screen->devinfo, in v3d_update_compiled_fs()
1009 if (v3d->screen->has_csd) { in v3d_program_init()
/third_party/vk-gl-cts/modules/egl/
H A DteglBufferAgeTests.cpp198 void readPixels (const glw::Functions& gl, tcu::Surface* screen);
709 void readPixels (const glw::Functions& gl, tcu::Surface* screen) in readPixels() argument
711 gl.readPixels(0, 0, screen->getWidth(), screen->getHeight(), GL_RGBA, GL_UNSIGNED_BYTE, screen->getAccess().getDataPtr()); in readPixels()
H A DteglPartialUpdateTests.cpp186 void readPixels (const glw::Functions& gl, tcu::Surface* screen);
654 void readPixels (const glw::Functions& gl, tcu::Surface* screen) in readPixels() argument
656 gl.readPixels(0, 0, screen->getWidth(), screen->getHeight(), GL_RGBA, GL_UNSIGNED_BYTE, screen->getAccess().getDataPtr()); in readPixels()
/third_party/vk-gl-cts/modules/glshared/
H A DglsVertexArrayTests.cpp1735 const tcu::Surface& screen = m_glArrayPack->getSurface(); in compare() local
1741 m_isOk = tcu::fuzzyCompare(m_testCtx.getLog(), "Compare Results", "Compare Results", ref.getAccess(), screen.getAccess(), 1.5f, tcu::COMPARE_LOG_RESULT); in compare()
1755 tcu::RGBA screenPixel = screen.getPixel(x, y); in compare()
1769 bool screenThin = (!tcu::compareThreshold(screenPixel, screen.getPixel(x-1, y ), threshold) && !tcu::compareThreshold(screenPixel, screen.getPixel(x+1, y ), threshold)) || in compare()
1770 (!tcu::compareThreshold(screenPixel, screen.getPixel(x , y-1), threshold) && !tcu::compareThreshold(screenPixel, screen.getPixel(x , y+1), threshold)); in compare()
1780 // Check reference pixel against screen pixel in compare()
1782 tcu::RGBA screenCmpPixel = screen.getPixel(x+dx, y+dy); in compare()
1791 // Check screen pixel in compare()
[all...]
/third_party/mesa3d/src/gallium/drivers/softpipe/
H A Dsp_state_shader.c135 shader->tokens = nir_to_tgsi(templ->ir.nir, pipe->screen); in softpipe_create_shader_state()
373 constants = softpipe_user_buffer_create(pipe->screen, in softpipe_set_constant_buffer()
422 state->tokens = (void *)nir_to_tgsi(s, pipe->screen); in softpipe_create_compute_state()

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