/kernel/linux/linux-6.6/kernel/events/ |
H A D | core.c | 3271 * rotate_necessary, is will be reset by in __pmu_ctx_sched_out() 5711 u64 perf_event_pause(struct perf_event *event, bool reset) in perf_event_pause() argument 5720 if (reset) in perf_event_pause()
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/kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi2/ |
H A D | gaudi2.c | 2859 /* No point of asking this information again when not doing hard reset, as the device in gaudi2_cpucp_info_get() 2860 * CPU hasn't been reset in gaudi2_cpucp_info_get() 2994 dev_dbg(hdev->dev, "H/W state is dirty, must reset before initializing\n"); in gaudi2_early_init() 2997 dev_err(hdev->dev, "failed to reset HW in dirty state (%d)\n", rc); in gaudi2_early_init() 4346 * before apply core reset. in gaudi2_stop_dcore_dec() 4386 * before apply core reset. in gaudi2_stop_pcie_dec() 4687 * in case of soft reset do a manual flush for QMANs (currently called in gaudi2_halt_engines() 5530 /* Need to manually reset the status to 0 */ in gaudi2_mmu_invalidate_cache_status_poll() 5945 * we need to reset the chip before doing H/W init. This register is in gaudi2_hw_init() 5946 * cleared by the H/W upon H/W reset in gaudi2_hw_init() [all...] |
/third_party/glfw/deps/glad/ |
H A D | gl.h | 2192 typedef void (GLAD_API_PTR *PFNGLGETNHISTOGRAMARBPROC)(GLenum target, GLboolean reset, GLenum format, GLenum type, GLsizei bufSize, void * values); 2196 typedef void (GLAD_API_PTR *PFNGLGETNMINMAXARBPROC)(GLenum target, GLboolean reset, GLenum format, GLenum type, GLsizei bufSize, void * values);
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/third_party/skia/third_party/externals/swiftshader/include/vulkan/ |
H A D | vulkan.hpp | 1299 reset( other.release() ); 1339 void reset( Type const & value = Type() ) VULKAN_HPP_NOEXCEPT
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H A D | vulkan_handles.hpp | 3239 reset( VULKAN_HPP_NAMESPACE::CommandBufferResetFlags flags, 3244 reset( VULKAN_HPP_NAMESPACE::CommandBufferResetFlags flags VULKAN_HPP_DEFAULT_ARGUMENT_ASSIGNMENT,
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/third_party/json/tests/abi/include/nlohmann/ |
H A D | json_v3_10_5.hpp | 6658 // reset token_buffer (ignore opening quote) 6659 reset(); 7373 // reset token_buffer to store the number's bytes 7374 reset(); 7721 /// reset token_buffer; current character is beginning of token 7722 void reset() noexcept 7746 // just reset the next_unget variable and work with current 16526 // write buffer and reset index; there must be 13 bytes 16564 // reset length buffer to the last accepted index; 16587 // write buffer and reset inde [all...] |
/third_party/json/single_include/nlohmann/ |
H A D | json.hpp | 7557 // reset token_buffer (ignore opening quote) 7558 reset(); 8272 // reset token_buffer to store the number's bytes 8273 reset(); 8620 /// reset token_buffer; current character is beginning of token 8621 void reset() noexcept 8645 // just reset the next_unget variable and work with current 13913 errno = 0; // strtoull doesn't reset errno 18376 // write buffer and reset index; there must be 13 bytes 18412 // reset lengt [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4244 // we've carefully laid out the parameters so that when sp is reset they'll be in LowerCall() 8710 Info.align.reset(); in getTgtMemIntrinsic() 8736 Info.align.reset(); in getTgtMemIntrinsic() 9164 // If we're going to generate more than one load, reset the sub-vector type in lowerInterleavedLoad() 9304 // If we're going to generate more than one store, reset the lane length in lowerInterleavedStore() 11405 IndexNotInserted.reset(IndexVal); in replaceSplatVectorStore()
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/foundation/ability/ability_runtime/services/abilitymgr/src/ |
H A D | ability_manager_service.cpp | 462 eventHandler_.reset(); in OnStop() 463 taskHandler_.reset(); in OnStop() 4480 // reset ipc identity in NotifyCompleteContinuation() 6291 TAG_LOGI(AAFwkTag::ABILITYMGR, "stage mode, abilityInfo SERVICE type reset EXTENSION"); in GenerateAbilityRequest()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v10_0.c | 6200 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_gfx_mqd_init() 6278 /* reset mqd with the backup copy */ in gfx_v10_0_gfx_init_queue() 6281 /* reset the ring */ in gfx_v10_0_gfx_init_queue() 6485 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_compute_mqd_init() 6601 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_kiq_init_register() 6632 /* reset MQD to a clean status */ in gfx_v10_0_kiq_init_queue() 6636 /* reset ring buffer */ in gfx_v10_0_kiq_init_queue() 6678 /* reset MQD to a clean status */ in gfx_v10_0_kcq_init_queue() 6682 /* reset ring buffer */ in gfx_v10_0_kcq_init_queue() 7488 /* reset CGC in gfx_v10_0_update_coarse_grain_clock_gating() [all...] |
H A D | gfx_v9_0.c | 3535 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_mqd_init() 3656 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_kiq_init_register() 3726 /* reset MQD to a clean status */ in gfx_v9_0_kiq_init_queue() 3730 /* reset ring buffer */ in gfx_v9_0_kiq_init_queue() 3776 /* reset MQD to a clean status */ in gfx_v9_0_kcq_init_queue() 3780 /* reset ring buffer */ in gfx_v9_0_kcq_init_queue() 4122 /* don't wait anymore for gpu reset case because this way may in gfx_v9_0_kiq_read_clock() 4997 /* reset CGCG/CGLS bits */ in gfx_v9_0_update_coarse_grain_clock_gating() 5090 .reset = gfx_v9_0_rlc_reset,
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/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_link.c | 578 * reset value or init tool in bnx2x_ets_e3b0_nig_disabled() 697 * TODO_ETS - Should be done by reset value or init tool in bnx2x_ets_e3b0_pbf_disabled() 706 /* TODO_ETS - Should be done by reset value or init tool */ in bnx2x_ets_e3b0_pbf_disabled() 1470 /* reset and unreset the emac core */ in bnx2x_emac_init() 1484 /* self clear reset */ in bnx2x_emac_init() 1491 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val); in bnx2x_emac_init() 1608 /* Set MAC address for source TX Pause/PFC frames (under SW reset) */ in bnx2x_umac_enable() 1650 * already out of reset, it means the mode has already been set, in bnx2x_xmac_init() 1651 * and it must not* reset the XMAC again, since it controls both in bnx2x_xmac_init() 1662 "XMAC already out of reset i in bnx2x_xmac_init() 4274 bnx2x_warpcore_reset_lane(struct bnx2x *bp, struct bnx2x_phy *phy, u8 reset) bnx2x_warpcore_reset_lane() argument [all...] |
/kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_link.c | 578 * reset value or init tool in bnx2x_ets_e3b0_nig_disabled() 697 * TODO_ETS - Should be done by reset value or init tool in bnx2x_ets_e3b0_pbf_disabled() 706 /* TODO_ETS - Should be done by reset value or init tool */ in bnx2x_ets_e3b0_pbf_disabled() 1470 /* reset and unreset the emac core */ in bnx2x_emac_init() 1484 /* self clear reset */ in bnx2x_emac_init() 1491 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val); in bnx2x_emac_init() 1608 /* Set MAC address for source TX Pause/PFC frames (under SW reset) */ in bnx2x_umac_enable() 1650 * already out of reset, it means the mode has already been set, in bnx2x_xmac_init() 1651 * and it must not* reset the XMAC again, since it controls both in bnx2x_xmac_init() 1662 "XMAC already out of reset i in bnx2x_xmac_init() 4274 bnx2x_warpcore_reset_lane(struct bnx2x *bp, struct bnx2x_phy *phy, u8 reset) bnx2x_warpcore_reset_lane() argument [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v10_0.c | 6423 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_gfx_mqd_init() 6460 /* reset the ring */ in gfx_v10_0_gfx_init_queue() 6590 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_compute_mqd_init() 6701 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_kiq_init_register() 6731 /* reset MQD to a clean status */ in gfx_v10_0_kiq_init_queue() 6735 /* reset ring buffer */ in gfx_v10_0_kiq_init_queue() 6782 /* reset ring buffer */ in gfx_v10_0_kcq_init_queue() 7702 /* reset CGCG/CGLS bits */ in gfx_v10_0_update_coarse_grain_clock_gating() 7739 /* reset FGCG bits */ in gfx_v10_0_update_fine_grain_clock_gating() 7746 /* reset RL in gfx_v10_0_update_fine_grain_clock_gating() [all...] |
/third_party/node/deps/v8/src/api/ |
H A D | api.cc | 2661 cached_data.reset(new i::AlignedCachedData(source->cached_data->data, in CompileFunctionInternal() 10438 callee_saved.reset(); in operator =()
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/third_party/skia/third_party/externals/spirv-cross/ |
H A D | spirv_msl.cpp | 1451 reset(); in compile() 1461 buffer.reset(); in compile()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
H A D | ScalarEvolution.cpp | 12105 SE.reset(new ScalarEvolution( 12113 void ScalarEvolutionWrapperPass::releaseMemory() { SE.reset(); }
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/third_party/vulkan-headers/include/vulkan/ |
H A D | vulkan.hpp | 912 reset( other.release() ); 952 void reset( Type const & value = Type() ) VULKAN_HPP_NOEXCEPT
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/foundation/arkui/ace_engine/frameworks/core/components/web/resource/ |
H A D | web_delegate.cpp | 2148 delegate->configChangeObserver_.reset(); in UnRegisterConfigObserver()
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/foundation/arkui/ace_engine/frameworks/core/components_ng/pattern/web/ |
H A D | web_pattern.cpp | 440 previewImageNodeId_.reset(); in RemovePreviewMenuNode() 991 // reset in ZoomOutAndIn() 1005 // reset in ZoomOutAndIn() 1265 TAG_LOGI(AceLogTag::ACE_WEB, "DragDrop Do not reset drag action when dragging," in WebOnMouseEvent()
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/foundation/bundlemanager/bundle_framework/services/bundlemgr/test/unittest/bms_bundle_installer_test/ |
H A D | bms_bundle_installer_test.cpp | 339 bundleMgrService_.reset(); in StopBundleService() 598 // reset the install state in HWTEST_F()
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/foundation/bundlemanager/bundle_framework/services/bundlemgr/test/unittest/bms_bundle_manager_test/ |
H A D | bms_bundle_manager_test.cpp | 305 bundleMgrService_.reset(); in StopBundleService()
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/foundation/window/window_manager/window_scene/interfaces/kits/napi/scene_session_manager/ |
H A D | js_scene_session.cpp | 2080 callbackRef.reset(reinterpret_cast<NativeReference*>(result)); in OnRegisterCallback()
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/kernel/linux/linux-5.10/drivers/media/i2c/cx25840/ |
H A D | cx25840-core.c | 574 *reset configuration is described on page 3-77 in cx25836_initialize() 795 /* DIF in reset? */ in cx23885_initialize() 1043 /* DIF in reset? */ in cx231xx_initialize() 2318 * Alternatively, you can call the reset operation instead of this one. 5727 .reset = cx25840_reset, 5870 "A method to reset it from the cx25840 driver software is not known at this time\n"); in cx25840_probe()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_dp.c | 3201 /* ILK workaround: disable reset around power sequence */ in edp_panel_on() 3218 pp |= PANEL_POWER_RESET; /* restore panel reset bit */ in edp_panel_on() 3781 /* Assert data lane reset */ in chv_post_disable_dp() 6819 .reset = intel_dp_encoder_reset,
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